IT8123734A0 - Metodo per fare circuiti integrati. - Google Patents

Metodo per fare circuiti integrati.

Info

Publication number
IT8123734A0
IT8123734A0 IT8123734A IT2373481A IT8123734A0 IT 8123734 A0 IT8123734 A0 IT 8123734A0 IT 8123734 A IT8123734 A IT 8123734A IT 2373481 A IT2373481 A IT 2373481A IT 8123734 A0 IT8123734 A0 IT 8123734A0
Authority
IT
Italy
Prior art keywords
integrated circuits
making integrated
making
circuits
integrated
Prior art date
Application number
IT8123734A
Other languages
English (en)
Other versions
IT1138546B (it
Inventor
Dale Marius Brown
Mario Ghezzo
Kang-Lung Wang
Original Assignee
Gen Electric
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gen Electric filed Critical Gen Electric
Publication of IT8123734A0 publication Critical patent/IT8123734A0/it
Application granted granted Critical
Publication of IT1138546B publication Critical patent/IT1138546B/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H01L21/2652—Through-implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76213—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Power Engineering (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Element Separation (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Formation Of Insulating Films (AREA)
IT23734/81A 1980-09-15 1981-09-02 Metodo per fare circuiti integrati IT1138546B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US18750280A 1980-09-15 1980-09-15

Publications (2)

Publication Number Publication Date
IT8123734A0 true IT8123734A0 (it) 1981-09-02
IT1138546B IT1138546B (it) 1986-09-17

Family

ID=22689251

Family Applications (1)

Application Number Title Priority Date Filing Date
IT23734/81A IT1138546B (it) 1980-09-15 1981-09-02 Metodo per fare circuiti integrati

Country Status (5)

Country Link
JP (1) JPS5780744A (it)
DE (1) DE3135994A1 (it)
FR (1) FR2490402A1 (it)
GB (1) GB2083946A (it)
IT (1) IT1138546B (it)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60132353A (ja) * 1983-12-20 1985-07-15 Mitsubishi Electric Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
GB2083946A (en) 1982-03-31
IT1138546B (it) 1986-09-17
DE3135994A1 (de) 1982-04-29
JPS5780744A (en) 1982-05-20
FR2490402A1 (fr) 1982-03-19

Similar Documents

Publication Publication Date Title
IT8123733A0 (it) Metodo per fare circuiti integrati.
IT8123736A0 (it) Metodo per fare circuiti integrati.
IT8321168A0 (it) Apparato per il collaudo ci circuiti integrati.
IT8219560A0 (it) Metodo per fare poliimmidi.
IT8320438A0 (it) Procedimento per formare dispositivi a circuiti integrati complementari.
BE891258A (fr) Encapsulation pour un circuit integre
NO813438L (no) Digital syntetiseringskrets.
NL191300C (nl) Verstommingsschakeling.
NO813437L (no) Digital linjekrets.
NO156612C (no) Polyeterforbindelser.
NL188125C (nl) Halfgeleiderfotodiode.
ES507510A0 (es) Un terminal electronico de distribucion de documentos.
IT8123424A0 (it) Dispositivo per ammorbidire il cuoio.
NO812592L (no) Elektrode.
IT8224690A0 (it) Procedimento di fabbricazione di circuiti stampati.
IT8122944A0 (it) Procedimento di retro-corrisione per circuiti integrati.
IT8123502A0 (it) Procedimento per la fabbricazione di circuiti integrati.
FI73925B (fi) Styrsystem foer fordon.
NL8102171A (nl) Boormethode.
IT8121668A0 (it) Procedimento di fabbricazione di circuiti stampati.
FI812084A7 (fi) Menetelmä kiinnitarttumisen varmistamiseksi.
IT8123734A0 (it) Metodo per fare circuiti integrati.
NO810565L (no) Mynthylse.
FI833929A7 (fi) Menetelmä anoreksian aiheuttamiseksi.
NO153513C (no) Stasjon for fjernvikningsanlegg.