IT8123243A0 - Circuito di monitoraggio di impulsi. - Google Patents

Circuito di monitoraggio di impulsi.

Info

Publication number
IT8123243A0
IT8123243A0 IT8123243A IT2324381A IT8123243A0 IT 8123243 A0 IT8123243 A0 IT 8123243A0 IT 8123243 A IT8123243 A IT 8123243A IT 2324381 A IT2324381 A IT 2324381A IT 8123243 A0 IT8123243 A0 IT 8123243A0
Authority
IT
Italy
Prior art keywords
monitoring circuit
pulse monitoring
pulse
circuit
monitoring
Prior art date
Application number
IT8123243A
Other languages
English (en)
Other versions
IT1138899B (it
Inventor
James R Holden
Original Assignee
Gte Automatic Electric Lab Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gte Automatic Electric Lab Inc filed Critical Gte Automatic Electric Lab Inc
Publication of IT8123243A0 publication Critical patent/IT8123243A0/it
Application granted granted Critical
Publication of IT1138899B publication Critical patent/IT1138899B/it

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/19—Monitoring patterns of pulse trains
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R29/00—Arrangements for measuring or indicating electric quantities not covered by groups G01R19/00 - G01R27/00
    • G01R29/02—Measuring characteristics of individual pulses, e.g. deviation from pulse flatness, rise time or duration
    • G01R29/027—Indicating that a pulse characteristic is either above or below a predetermined value or within or beyond a predetermined range of values
    • G01R29/033—Indicating that a pulse characteristic is either above or below a predetermined value or within or beyond a predetermined range of values giving an indication of the number of times this occurs, i.e. multi-channel analysers (the characteristic being frequency)

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Manipulation Of Pulses (AREA)
  • Monitoring And Testing Of Exchanges (AREA)
IT23243/81A 1980-12-29 1981-07-30 Circuito di monitoraggio di impulsi IT1138899B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/220,932 US4379993A (en) 1980-12-29 1980-12-29 Pulse failure monitor circuit employing selectable frequency reference clock and counter pair to vary time period of pulse failure indication

Publications (2)

Publication Number Publication Date
IT8123243A0 true IT8123243A0 (it) 1981-07-30
IT1138899B IT1138899B (it) 1986-09-17

Family

ID=22825616

Family Applications (1)

Application Number Title Priority Date Filing Date
IT23243/81A IT1138899B (it) 1980-12-29 1981-07-30 Circuito di monitoraggio di impulsi

Country Status (5)

Country Link
US (1) US4379993A (it)
JP (1) JPS57125561A (it)
BE (1) BE889780A (it)
CA (1) CA1184618A (it)
IT (1) IT1138899B (it)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4651329A (en) * 1981-09-23 1987-03-17 Honeywell Information Systems Inc. Digital decode logic for converting successive binary zero pulses having opposite polarity to a stream of data pulses
JPS6077546A (ja) * 1983-10-05 1985-05-02 Fujitsu Ltd ディジタル無線回線の監視方式
US4628269A (en) * 1984-05-23 1986-12-09 Motorola, Inc. Pulse detector for missing or extra pulses
JPH07104689B2 (ja) * 1986-11-07 1995-11-13 フアナツク株式会社 パルスエンコ−ダ
US4860318A (en) * 1988-07-06 1989-08-22 The United States Of America As Represented By The Secretary Of The Air Force PSK detection using an IFM receiver
JPH0816276A (ja) * 1994-06-30 1996-01-19 Mitsubishi Denki Semiconductor Software Kk マイクロコンピュータ
KR100192775B1 (ko) * 1995-12-30 1999-06-15 유기범 클럭의 유무 판별 장치
KR100208292B1 (ko) * 1996-12-31 1999-07-15 유기범 Ipc의 이중화 버스 클럭 감시 회로
US7296170B1 (en) 2004-01-23 2007-11-13 Zilog, Inc. Clock controller with clock source fail-safe logic
CN102478610A (zh) * 2010-11-30 2012-05-30 英业达股份有限公司 占空比测量系统与其方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3350580A (en) * 1965-11-30 1967-10-31 Sperry Rand Corp Monitor employing logic gate and counter to indicate normal pulse-train failure after predetermined time interval
US3582795A (en) * 1969-08-14 1971-06-01 Bell Telephone Labor Inc Delayed clock pulse synchronizing of random input pulses
US3936745A (en) * 1974-11-12 1976-02-03 Mdh Industries, Inc. Method of measuring the duration of a discontinuous signal
US4023109A (en) * 1975-08-14 1977-05-10 The Van Epps Design And Development Co., Inc. Sequence control system with timed operations
US4052676A (en) * 1976-06-10 1977-10-04 Woodward Governor Company Digital-analog frequency error signaling

Also Published As

Publication number Publication date
JPS57125561A (en) 1982-08-04
BE889780A (fr) 1981-11-16
US4379993A (en) 1983-04-12
CA1184618A (en) 1985-03-26
IT1138899B (it) 1986-09-17

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