IT7826706A0 - Disposizione circuitale per impedire doppi errori in un impianto elaboratore di dati. - Google Patents

Disposizione circuitale per impedire doppi errori in un impianto elaboratore di dati.

Info

Publication number
IT7826706A0
IT7826706A0 IT7826706A IT2670678A IT7826706A0 IT 7826706 A0 IT7826706 A0 IT 7826706A0 IT 7826706 A IT7826706 A IT 7826706A IT 2670678 A IT2670678 A IT 2670678A IT 7826706 A0 IT7826706 A0 IT 7826706A0
Authority
IT
Italy
Prior art keywords
data processing
processing system
circuit arrangement
prevent double
double errors
Prior art date
Application number
IT7826706A
Other languages
English (en)
Other versions
IT1098095B (it
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of IT7826706A0 publication Critical patent/IT7826706A0/it
Application granted granted Critical
Publication of IT1098095B publication Critical patent/IT1098095B/it

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0766—Error or fault reporting or storing
    • G06F11/0772—Means for error signaling, e.g. using interrupts, exception flags, dedicated error registers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Debugging And Monitoring (AREA)
  • Retry When Errors Occur (AREA)
IT26706/78A 1977-08-17 1978-08-11 Disposizione circuitale per impedire doppi errori in un impianto elaboratore di dati IT1098095B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2737133A DE2737133C2 (de) 1977-08-17 1977-08-17 Schaltungsanordnung zum Verhindern von Doppelfehlern in einer Datenverarbeitungsanlage

Publications (2)

Publication Number Publication Date
IT7826706A0 true IT7826706A0 (it) 1978-08-11
IT1098095B IT1098095B (it) 1985-08-31

Family

ID=6016643

Family Applications (1)

Application Number Title Priority Date Filing Date
IT26706/78A IT1098095B (it) 1977-08-17 1978-08-11 Disposizione circuitale per impedire doppi errori in un impianto elaboratore di dati

Country Status (8)

Country Link
AT (1) AT372531B (it)
BE (1) BE869812A (it)
CH (1) CH625066A5 (it)
DE (1) DE2737133C2 (it)
FR (1) FR2400730A1 (it)
GB (1) GB1597198A (it)
IT (1) IT1098095B (it)
NL (1) NL7806709A (it)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3036926C2 (de) * 1980-09-30 1984-07-26 Siemens AG, 1000 Berlin und 8000 München Verfahren und Anordnung zur Steuerung des Arbeitsablaufes in Datenverarbeitungsanlagen mit Mikroprogrammsteuerung
ATE120571T1 (de) * 1988-05-20 1995-04-15 Ibm Einrichtung für die fehlerkorrektur in einem selbstbewachten datenverarbeitungssystem.

Also Published As

Publication number Publication date
ATA516778A (de) 1983-02-15
DE2737133C2 (de) 1979-07-26
GB1597198A (en) 1981-09-03
AT372531B (de) 1983-10-25
BE869812A (fr) 1979-02-19
CH625066A5 (en) 1981-08-31
NL7806709A (nl) 1979-02-20
DE2737133B1 (de) 1978-11-30
IT1098095B (it) 1985-08-31
FR2400730A1 (fr) 1979-03-16

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