IT1074384B - Disposizione circuitale per raffiungere con indirizzi i dati in un impianto per la elaborazione di dati - Google Patents

Disposizione circuitale per raffiungere con indirizzi i dati in un impianto per la elaborazione di dati

Info

Publication number
IT1074384B
IT1074384B IT2009277A IT2009277A IT1074384B IT 1074384 B IT1074384 B IT 1074384B IT 2009277 A IT2009277 A IT 2009277A IT 2009277 A IT2009277 A IT 2009277A IT 1074384 B IT1074384 B IT 1074384B
Authority
IT
Italy
Prior art keywords
data
circuitive
arrangement
processing plant
data processing
Prior art date
Application number
IT2009277A
Other languages
English (en)
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Application granted granted Critical
Publication of IT1074384B publication Critical patent/IT1074384B/it

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G06F12/1045—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
IT2009277A 1976-02-12 1977-02-09 Disposizione circuitale per raffiungere con indirizzi i dati in un impianto per la elaborazione di dati IT1074384B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19762605617 DE2605617A1 (de) 1976-02-12 1976-02-12 Schaltungsanordnung zum adressieren von daten

Publications (1)

Publication Number Publication Date
IT1074384B true IT1074384B (it) 1985-04-20

Family

ID=5969725

Family Applications (1)

Application Number Title Priority Date Filing Date
IT2009277A IT1074384B (it) 1976-02-12 1977-02-09 Disposizione circuitale per raffiungere con indirizzi i dati in un impianto per la elaborazione di dati

Country Status (7)

Country Link
BE (1) BE851356A (it)
CH (1) CH601859A5 (it)
DE (1) DE2605617A1 (it)
FR (1) FR2341161A1 (it)
GB (1) GB1553048A (it)
IT (1) IT1074384B (it)
NL (1) NL7701258A (it)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2056135B (en) * 1977-12-22 1982-11-24 Honeywell Inf Systems Data processing system including a cache store
US4218741A (en) * 1978-06-23 1980-08-19 International Business Machines Corporation Paging mechanism
US4170039A (en) * 1978-07-17 1979-10-02 International Business Machines Corporation Virtual address translation speed up technique
DE2935135C2 (de) * 1979-08-30 1983-01-20 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung zum Verarbeiten von Daten in einer aus Zentralprozessor, Arbeitsspeicher und dazwischen angeordnetem Pufferspeicher bestehenden Datenverarbeitungsanlage
DE2939412C2 (de) * 1979-09-28 1983-11-17 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordung zum Adressieren von Daten für Lese- und Schreibzugriffe in einer Datenverarbeitungsanlage
DE2939411C2 (de) * 1979-09-28 1982-09-02 Siemens AG, 1000 Berlin und 8000 München Datenverarbeitungsanlage mit virtueller Speicheradressierung
CA1183962A (en) * 1982-04-15 1985-03-12 Ashgar K. Malik Memory addressing system

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3786427A (en) * 1971-06-29 1974-01-15 Ibm Dynamic address translation reversed
US3761881A (en) * 1971-06-30 1973-09-25 Ibm Translation storage scheme for virtual memory system
US3723976A (en) * 1972-01-20 1973-03-27 Ibm Memory system with logical and real addressing
US3829840A (en) * 1972-07-24 1974-08-13 Ibm Virtual memory system
US3840863A (en) * 1973-10-23 1974-10-08 Ibm Dynamic storage hierarchy system

Also Published As

Publication number Publication date
CH601859A5 (it) 1978-07-14
DE2605617A1 (de) 1977-08-18
BE851356A (fr) 1977-08-11
NL7701258A (nl) 1977-08-16
FR2341161A1 (fr) 1977-09-09
GB1553048A (en) 1979-09-19

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