IT202200006458A1 - Sistema di elaborazione, relativo circuito integrato, dispositivo e procedimento - Google Patents

Sistema di elaborazione, relativo circuito integrato, dispositivo e procedimento Download PDF

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Publication number
IT202200006458A1
IT202200006458A1 IT102022000006458A IT202200006458A IT202200006458A1 IT 202200006458 A1 IT202200006458 A1 IT 202200006458A1 IT 102022000006458 A IT102022000006458 A IT 102022000006458A IT 202200006458 A IT202200006458 A IT 202200006458A IT 202200006458 A1 IT202200006458 A1 IT 202200006458A1
Authority
IT
Italy
Prior art keywords
integrated circuit
processing system
related integrated
circuit
processing
Prior art date
Application number
IT102022000006458A
Other languages
English (en)
Inventor
Roberto Colombo
Vivek Mohan Sharma
Original Assignee
Stmicroelectronics Application Gmbh
St Microelectronics Int Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Stmicroelectronics Application Gmbh, St Microelectronics Int Nv filed Critical Stmicroelectronics Application Gmbh
Priority to IT102022000006458A priority Critical patent/IT202200006458A1/it
Priority to EP23158857.5A priority patent/EP4254130A1/en
Priority to US18/186,624 priority patent/US20230314506A1/en
Priority to CN202310334747.XA priority patent/CN116893930A/zh
Publication of IT202200006458A1 publication Critical patent/IT202200006458A1/it

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31721—Power aspects, e.g. power supplies for test circuits, power saving during test
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/24—Resetting means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G06F11/1415—Saving, restoring, recovering or retrying at system level
    • G06F11/1441—Resetting or repowering
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31724—Test controller, e.g. BIST state machine
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318566—Comparators; Diagnosing the device under test
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/28—Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2273—Test methods
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/22—Modifications for ensuring a predetermined initial state when the supply voltage has been applied

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Computer Hardware Design (AREA)
  • Debugging And Monitoring (AREA)
IT102022000006458A 2022-04-01 2022-04-01 Sistema di elaborazione, relativo circuito integrato, dispositivo e procedimento IT202200006458A1 (it)

Priority Applications (4)

Application Number Priority Date Filing Date Title
IT102022000006458A IT202200006458A1 (it) 2022-04-01 2022-04-01 Sistema di elaborazione, relativo circuito integrato, dispositivo e procedimento
EP23158857.5A EP4254130A1 (en) 2022-04-01 2023-02-27 Processing system, related integrated circuit, device and method
US18/186,624 US20230314506A1 (en) 2022-04-01 2023-03-20 Processing system, related integrated circuit, device and method
CN202310334747.XA CN116893930A (zh) 2022-04-01 2023-03-31 处理系统、相关集成电路以及设备和方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT102022000006458A IT202200006458A1 (it) 2022-04-01 2022-04-01 Sistema di elaborazione, relativo circuito integrato, dispositivo e procedimento

Publications (1)

Publication Number Publication Date
IT202200006458A1 true IT202200006458A1 (it) 2023-10-01

Family

ID=82019323

Family Applications (1)

Application Number Title Priority Date Filing Date
IT102022000006458A IT202200006458A1 (it) 2022-04-01 2022-04-01 Sistema di elaborazione, relativo circuito integrato, dispositivo e procedimento

Country Status (4)

Country Link
US (1) US20230314506A1 (it)
EP (1) EP4254130A1 (it)
CN (1) CN116893930A (it)
IT (1) IT202200006458A1 (it)

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10320080A (ja) * 1997-05-21 1998-12-04 Nec Shizuoka Ltd 情報処理装置のリセット回路およびリセット方法
WO2007049162A2 (en) * 2005-10-25 2007-05-03 Nxp B.V. Data processing arrangement comprising a reset facility.
US20120166131A1 (en) * 2010-12-28 2012-06-28 Stmicroelectronics Pvt. Ltd. Integrated device test circuits and methods
WO2013076530A1 (en) * 2011-11-23 2013-05-30 Freescale Semiconductor, Inc. Microprocessor device, and method of managing reset events therefor
US20160085279A1 (en) * 2014-09-22 2016-03-24 Freescale Semiconductor, Inc. Method for resetting an electronic device having independent device domains
EP3343373A1 (en) * 2016-12-27 2018-07-04 Renesas Electronics Corporation Semiconductor device comprising watchdog timer
EP3534261A1 (en) 2018-03-02 2019-09-04 STMicroelectronics Application GmbH Processing system, related integrated circuit and method
US20200143090A1 (en) * 2018-11-01 2020-05-07 Nvidia Corporation Protecting circuits from hacking using a digital reset detector
EP3719636A1 (en) * 2019-04-03 2020-10-07 STMicroelectronics Application GmbH Processing system, related integrated circuit, device and method
CN111880634A (zh) * 2020-06-29 2020-11-03 中国人民解放军战略支援部队信息工程大学 一种srio交换芯片的复位结构及其复位状态监控方法

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10320080A (ja) * 1997-05-21 1998-12-04 Nec Shizuoka Ltd 情報処理装置のリセット回路およびリセット方法
WO2007049162A2 (en) * 2005-10-25 2007-05-03 Nxp B.V. Data processing arrangement comprising a reset facility.
US20120166131A1 (en) * 2010-12-28 2012-06-28 Stmicroelectronics Pvt. Ltd. Integrated device test circuits and methods
WO2013076530A1 (en) * 2011-11-23 2013-05-30 Freescale Semiconductor, Inc. Microprocessor device, and method of managing reset events therefor
US20160085279A1 (en) * 2014-09-22 2016-03-24 Freescale Semiconductor, Inc. Method for resetting an electronic device having independent device domains
EP3343373A1 (en) * 2016-12-27 2018-07-04 Renesas Electronics Corporation Semiconductor device comprising watchdog timer
EP3534261A1 (en) 2018-03-02 2019-09-04 STMicroelectronics Application GmbH Processing system, related integrated circuit and method
US20200143090A1 (en) * 2018-11-01 2020-05-07 Nvidia Corporation Protecting circuits from hacking using a digital reset detector
EP3719636A1 (en) * 2019-04-03 2020-10-07 STMicroelectronics Application GmbH Processing system, related integrated circuit, device and method
CN111880634A (zh) * 2020-06-29 2020-11-03 中国人民解放军战略支援部队信息工程大学 一种srio交换芯片的复位结构及其复位状态监控方法

Also Published As

Publication number Publication date
EP4254130A1 (en) 2023-10-04
US20230314506A1 (en) 2023-10-05
CN116893930A (zh) 2023-10-17

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