IT202200006455A1 - Sistema di elaborazione, relativo circuito integrato, dispositivo e procedimento - Google Patents

Sistema di elaborazione, relativo circuito integrato, dispositivo e procedimento Download PDF

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Publication number
IT202200006455A1
IT202200006455A1 IT102022000006455A IT202200006455A IT202200006455A1 IT 202200006455 A1 IT202200006455 A1 IT 202200006455A1 IT 102022000006455 A IT102022000006455 A IT 102022000006455A IT 202200006455 A IT202200006455 A IT 202200006455A IT 202200006455 A1 IT202200006455 A1 IT 202200006455A1
Authority
IT
Italy
Prior art keywords
integrated circuit
processing system
related integrated
circuit
processing
Prior art date
Application number
IT102022000006455A
Other languages
English (en)
Inventor
Roberto Colombo
Vivek Mohan Sharma
Samiksha Agarwal
Original Assignee
Stmicroelectronics Application Gmbh
St Microelectronics Int Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Stmicroelectronics Application Gmbh, St Microelectronics Int Nv filed Critical Stmicroelectronics Application Gmbh
Priority to IT102022000006455A priority Critical patent/IT202200006455A1/it
Priority to EP23158845.0A priority patent/EP4254196A1/en
Priority to US18/186,549 priority patent/US12019118B2/en
Publication of IT202200006455A1 publication Critical patent/IT202200006455A1/it

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31703—Comparison aspects, e.g. signature analysis, comparators
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31722—Addressing or selecting of test units, e.g. transmission protocols for selecting test units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/2215—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test error correction or detection circuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/27—Built-in tests
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0754—Error or fault detection not based on redundancy by exceeding limits

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Debugging And Monitoring (AREA)
IT102022000006455A 2022-04-01 2022-04-01 Sistema di elaborazione, relativo circuito integrato, dispositivo e procedimento IT202200006455A1 (it)

Priority Applications (3)

Application Number Priority Date Filing Date Title
IT102022000006455A IT202200006455A1 (it) 2022-04-01 2022-04-01 Sistema di elaborazione, relativo circuito integrato, dispositivo e procedimento
EP23158845.0A EP4254196A1 (en) 2022-04-01 2023-02-27 Processing system, related integrated circuit, device and method
US18/186,549 US12019118B2 (en) 2022-04-01 2023-03-20 Processing system, related integrated circuit, device and method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT102022000006455A IT202200006455A1 (it) 2022-04-01 2022-04-01 Sistema di elaborazione, relativo circuito integrato, dispositivo e procedimento

Publications (1)

Publication Number Publication Date
IT202200006455A1 true IT202200006455A1 (it) 2023-10-01

Family

ID=82020286

Family Applications (1)

Application Number Title Priority Date Filing Date
IT102022000006455A IT202200006455A1 (it) 2022-04-01 2022-04-01 Sistema di elaborazione, relativo circuito integrato, dispositivo e procedimento

Country Status (3)

Country Link
US (1) US12019118B2 (it)
EP (1) EP4254196A1 (it)
IT (1) IT202200006455A1 (it)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3534261A1 (en) 2018-03-02 2019-09-04 STMicroelectronics Application GmbH Processing system, related integrated circuit and method
EP3534262A1 (en) 2018-03-02 2019-09-04 STMicroelectronics Application GmbH Processing system, related integrated circuit and method
US11209482B1 (en) * 2020-11-30 2021-12-28 Stmicroelectronics International N.V. Methods and devices for testing comparators

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20220334865A1 (en) 2021-04-16 2022-10-20 Stmicroelectronics Application Gmbh Processing system, related integrated circuit, device and method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3534261A1 (en) 2018-03-02 2019-09-04 STMicroelectronics Application GmbH Processing system, related integrated circuit and method
EP3534262A1 (en) 2018-03-02 2019-09-04 STMicroelectronics Application GmbH Processing system, related integrated circuit and method
US11209482B1 (en) * 2020-11-30 2021-12-28 Stmicroelectronics International N.V. Methods and devices for testing comparators

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
KEN AU ED - DARL KUHN: "ITERATIVE CMOS MAGNITUDE COMPARATOR CELL", IP.COM, IP.COM INC., WEST HENRIETTA, NY, US, 16 October 2001 (2001-10-16), XP013000730, ISSN: 1533-0001 *

Also Published As

Publication number Publication date
US20230349969A1 (en) 2023-11-02
US12019118B2 (en) 2024-06-25
EP4254196A1 (en) 2023-10-04

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