IT1319130B1 - Circuito di controllo di uno stadio di pilotaggio d'uscita di uncircuito integrato - Google Patents

Circuito di controllo di uno stadio di pilotaggio d'uscita di uncircuito integrato

Info

Publication number
IT1319130B1
IT1319130B1 IT2000MI002529A ITMI20002529A IT1319130B1 IT 1319130 B1 IT1319130 B1 IT 1319130B1 IT 2000MI002529 A IT2000MI002529 A IT 2000MI002529A IT MI20002529 A ITMI20002529 A IT MI20002529A IT 1319130 B1 IT1319130 B1 IT 1319130B1
Authority
IT
Italy
Prior art keywords
output driving
driving stage
control circuit
integrated circuit
circuit output
Prior art date
Application number
IT2000MI002529A
Other languages
English (en)
Inventor
Lorenzo Bedarida
Luca Vandi
Carlo Lisi
Andrea Bellini
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to IT2000MI002529A priority Critical patent/IT1319130B1/it
Priority to US09/991,493 priority patent/US6567318B2/en
Publication of ITMI20002529A1 publication Critical patent/ITMI20002529A1/it
Application granted granted Critical
Publication of IT1319130B1 publication Critical patent/IT1319130B1/it

Links

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/24—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
    • G05F3/242—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only with compensation for device parameters, e.g. channel width modulation, threshold voltage, processing, or external variations, e.g. temperature, loading, supply voltage
    • G05F3/245—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only with compensation for device parameters, e.g. channel width modulation, threshold voltage, processing, or external variations, e.g. temperature, loading, supply voltage producing a voltage or current as a predetermined function of the temperature

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Logic Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
IT2000MI002529A 2000-11-23 2000-11-23 Circuito di controllo di uno stadio di pilotaggio d'uscita di uncircuito integrato IT1319130B1 (it)

Priority Applications (2)

Application Number Priority Date Filing Date Title
IT2000MI002529A IT1319130B1 (it) 2000-11-23 2000-11-23 Circuito di controllo di uno stadio di pilotaggio d'uscita di uncircuito integrato
US09/991,493 US6567318B2 (en) 2000-11-23 2001-11-21 Control circuit for an output driving stage of an integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT2000MI002529A IT1319130B1 (it) 2000-11-23 2000-11-23 Circuito di controllo di uno stadio di pilotaggio d'uscita di uncircuito integrato

Publications (2)

Publication Number Publication Date
ITMI20002529A1 ITMI20002529A1 (it) 2002-05-23
IT1319130B1 true IT1319130B1 (it) 2003-09-23

Family

ID=11446139

Family Applications (1)

Application Number Title Priority Date Filing Date
IT2000MI002529A IT1319130B1 (it) 2000-11-23 2000-11-23 Circuito di controllo di uno stadio di pilotaggio d'uscita di uncircuito integrato

Country Status (2)

Country Link
US (1) US6567318B2 (it)
IT (1) IT1319130B1 (it)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE60319774T2 (de) * 2002-05-08 2009-04-23 Nec Electronics Corp., Kawasaki Verfahren und Schaltungsanordnung zur Erzeugung eines Steuersignals zur Impedanzanpassung
US6826102B2 (en) * 2002-05-16 2004-11-30 Micron Technology, Inc. Noise resistant small signal sensing circuit for a memory device
US6813208B2 (en) 2002-07-09 2004-11-02 Micron Technology, Inc. System and method for sensing data stored in a resistive memory element using one bit of a digital count
ITTO20020811A1 (it) 2002-09-18 2004-03-19 Atmel Corp Buffer d'uscita con comando rapido.
JP4005086B2 (ja) * 2003-01-20 2007-11-07 株式会社ルネサステクノロジ 半導体集積回路
KR100522179B1 (ko) * 2003-02-26 2005-10-18 주식회사 애트랩 임피던스 교정기능을 갖는 반도체 장치
JP4086757B2 (ja) * 2003-10-23 2008-05-14 Ｎｅｃエレクトロニクス株式会社 半導体集積回路の入出力インターフェース回路
US7449924B2 (en) * 2004-09-16 2008-11-11 Texas Instruments Incorporated Latch-based serial port output buffer
US20070252638A1 (en) * 2006-04-26 2007-11-01 Farrukh Aquil Method and apparatus for temperature compensating off chip driver (OCD) circuit
US20080232169A1 (en) * 2007-03-20 2008-09-25 Atmel Corporation Nand-like memory array employing high-density nor-like memory devices
US7489125B2 (en) * 2007-04-02 2009-02-10 Teradyne, Inc. Calibrating a tester using ESD protection circuitry
EP2124124B1 (en) * 2008-05-21 2011-10-19 Austriamicrosystems AG Controlled current source and method for sourcing a current
KR101045086B1 (ko) * 2009-06-08 2011-06-29 주식회사 하이닉스반도체 터미네이션 회로 및 이를 포함하는 임피던스 매칭 장치
US8279684B2 (en) * 2009-10-14 2012-10-02 Taiwan Semiconductor Manufacturing Company, Ltd. Method for extending word-line pulses
US8159262B1 (en) * 2011-02-18 2012-04-17 Dipankar Bhattacharya Impedance compensation in a buffer circuit
US8531205B1 (en) * 2012-01-31 2013-09-10 Altera Corporation Programmable output buffer
US8797110B2 (en) * 2012-07-26 2014-08-05 Qualcomm Incorporated Buffer input impedance compensation in a reference clock signal buffer
US10917093B1 (en) * 2019-11-05 2021-02-09 Micron Technology, Inc. Self-adaptive termination impedance circuit
US10978137B1 (en) * 2020-02-19 2021-04-13 Nany A Technology Corporation Memory device and method of operating the same
US11527279B2 (en) 2020-06-22 2022-12-13 Micron Technology, Inc. Read algorithm for memory device

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3462104B2 (ja) * 1998-12-11 2003-11-05 株式会社東芝 プログラマブルインピーダンス回路及び半導体装置
KR100308791B1 (ko) * 1999-09-07 2001-11-05 윤종용 반도체 장치의 프로그래머블 임피던스 콘트롤 출력회로 및 프로그래머블 임피던스 콘트롤 방법
KR100391150B1 (ko) * 2000-11-15 2003-07-16 삼성전자주식회사 다단의 상위 코드 선택기를 갖는 반도체 장치의 임피던스콘트롤 출력회로 및 그의 동작방법

Also Published As

Publication number Publication date
US20020093374A1 (en) 2002-07-18
ITMI20002529A1 (it) 2002-05-23
US6567318B2 (en) 2003-05-20

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