DE10197112T1 - Herstellung integrierter Schaltungen - Google Patents
Herstellung integrierter SchaltungenInfo
- Publication number
- DE10197112T1 DE10197112T1 DE10197112T DE10197112T DE10197112T1 DE 10197112 T1 DE10197112 T1 DE 10197112T1 DE 10197112 T DE10197112 T DE 10197112T DE 10197112 T DE10197112 T DE 10197112T DE 10197112 T1 DE10197112 T1 DE 10197112T1
- Authority
- DE
- Germany
- Prior art keywords
- manufacture
- integrated circuits
- circuits
- integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
- 238000004519 manufacturing process Methods 0.000 title 1
Classifications
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
- G03F7/70491—Information management, e.g. software; Active and passive control, e.g. details of controlling exposure processes or exposure tool monitoring processes
- G03F7/70541—Tagging, i.e. hardware or software tagging of features or components, e.g. using tagging scripts or tagging identifier codes for identification of chips, shots or wafers
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
- G03F1/26—Phase shift masks [PSM]; PSM blanks; Preparation thereof
- G03F1/32—Attenuating PSM [att-PSM], e.g. halftone PSM or PSM having semi-transparent phase shift portion; Preparation thereof
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Materials For Photolithography (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Preparing Plates And Mask In Photomechanical Process (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/752,809 US20040006485A1 (en) | 2000-12-27 | 2000-12-27 | Manufacturing integrated circuits |
PCT/US2001/050851 WO2002052344A2 (en) | 2000-12-27 | 2001-12-26 | Manufacturing integrated circuits using phase-shifting masks |
Publications (1)
Publication Number | Publication Date |
---|---|
DE10197112T1 true DE10197112T1 (de) | 2003-11-20 |
Family
ID=25027939
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE10197112T Ceased DE10197112T1 (de) | 2000-12-27 | 2001-12-26 | Herstellung integrierter Schaltungen |
Country Status (4)
Country | Link |
---|---|
US (1) | US20040006485A1 (de) |
AU (1) | AU2002229132A1 (de) |
DE (1) | DE10197112T1 (de) |
WO (1) | WO2002052344A2 (de) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20020156639A1 (en) * | 2001-02-27 | 2002-10-24 | Akira Ishikawa | Business method for a digital photolithography system |
JP2002328463A (ja) * | 2001-04-27 | 2002-11-15 | Mitsubishi Electric Corp | 半導体回路用フォトマスクの発注方法 |
US7003477B2 (en) * | 2002-03-01 | 2006-02-21 | Phillip Zarrow | Certification method for manufacturing process |
JP2004053807A (ja) * | 2002-07-18 | 2004-02-19 | Renesas Technology Corp | マスクメーカ選定方法 |
US7363236B2 (en) * | 2003-03-14 | 2008-04-22 | Chartered Semiconductor Manufacturing Ltd. | System, apparatus and method for reticle grade and pricing management |
US20050177526A1 (en) * | 2004-02-09 | 2005-08-11 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method for negotiations using a global pricing system |
US20070219929A1 (en) * | 2006-03-14 | 2007-09-20 | Jochen Steinbach | Planning granularity in manufacturing computing systems |
US8027857B2 (en) * | 2006-03-14 | 2011-09-27 | Sap Ag | Rough-cut manufacturing operations for use in planning |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62193249A (ja) * | 1986-02-20 | 1987-08-25 | Fuji Electric Co Ltd | 半導体装置の製造方法 |
DE19540348B4 (de) * | 1995-10-28 | 2007-01-11 | Micronas Gmbh | Verfahren zum Identifizieren von Bauelementen |
JP2692662B2 (ja) * | 1995-10-31 | 1997-12-17 | 日本電気株式会社 | 荷電粒子ビーム露光装置及び透過マスク寿命判定方法 |
US5787012A (en) * | 1995-11-17 | 1998-07-28 | Sun Microsystems, Inc. | Integrated circuit with identification signal writing circuitry distributed on multiple metal layers |
US6049789A (en) * | 1998-06-24 | 2000-04-11 | Mentor Graphics Corporation | Software pay per use licensing system |
US6433146B1 (en) * | 1999-05-18 | 2002-08-13 | The Board Of Trustees Of The University Of Illinois | Corn oil and protein extraction method |
-
2000
- 2000-12-27 US US09/752,809 patent/US20040006485A1/en not_active Abandoned
-
2001
- 2001-12-26 DE DE10197112T patent/DE10197112T1/de not_active Ceased
- 2001-12-26 WO PCT/US2001/050851 patent/WO2002052344A2/en not_active Application Discontinuation
- 2001-12-26 AU AU2002229132A patent/AU2002229132A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
US20040006485A1 (en) | 2004-01-08 |
AU2002229132A1 (en) | 2002-07-08 |
WO2002052344A3 (en) | 2003-12-18 |
WO2002052344A2 (en) | 2002-07-04 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8127 | New person/name/address of the applicant |
Owner name: SYNOPSYS, INC., MOUNTAIN VIEW, CALIF., US |
|
8110 | Request for examination paragraph 44 | ||
R002 | Refusal decision in examination/registration proceedings | ||
R003 | Refusal decision now final |
Effective date: 20120314 |