IT1233424B - Circuito antirimbalzo per circuiti digitali. - Google Patents
Circuito antirimbalzo per circuiti digitali.Info
- Publication number
- IT1233424B IT1233424B IT8722987A IT2298787A IT1233424B IT 1233424 B IT1233424 B IT 1233424B IT 8722987 A IT8722987 A IT 8722987A IT 2298787 A IT2298787 A IT 2298787A IT 1233424 B IT1233424 B IT 1233424B
- Authority
- IT
- Italy
- Prior art keywords
- booster circuit
- digital circuits
- circuits
- digital
- booster
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/125—Discriminating pulses
- H03K5/1252—Suppression or limitation of noise or interference
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Manipulation Of Pulses (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT8722987A IT1233424B (it) | 1987-12-14 | 1987-12-14 | Circuito antirimbalzo per circuiti digitali. |
EP88120115A EP0320711B1 (en) | 1987-12-14 | 1988-12-02 | Antibounce circuit for digital circuits |
DE8888120115T DE3866685D1 (de) | 1987-12-14 | 1988-12-02 | Entprellschaltung fuer digitale schaltkreise. |
US07/279,036 US4883993A (en) | 1987-12-14 | 1988-12-02 | Antibounce circuit for digital circuits |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT8722987A IT1233424B (it) | 1987-12-14 | 1987-12-14 | Circuito antirimbalzo per circuiti digitali. |
Publications (2)
Publication Number | Publication Date |
---|---|
IT8722987A0 IT8722987A0 (it) | 1987-12-14 |
IT1233424B true IT1233424B (it) | 1992-03-31 |
Family
ID=11202595
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT8722987A IT1233424B (it) | 1987-12-14 | 1987-12-14 | Circuito antirimbalzo per circuiti digitali. |
Country Status (4)
Country | Link |
---|---|
US (1) | US4883993A (it) |
EP (1) | EP0320711B1 (it) |
DE (1) | DE3866685D1 (it) |
IT (1) | IT1233424B (it) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
IT1243301B (it) * | 1990-05-25 | 1994-05-26 | Sgs Thomson Microelectronics | Circuito di filtraggio di un segnale logico affetto da spikes di commutazione |
US5146111A (en) * | 1991-04-10 | 1992-09-08 | International Business Machines Corporation | Glitch-proof powered-down on chip receiver with non-overlapping outputs |
US5394321A (en) * | 1992-09-02 | 1995-02-28 | Electric Power Research Institute, Inc. | Quasi square-wave back-EMF permanent magnet AC machines with five or more phases |
US5418479A (en) * | 1993-12-27 | 1995-05-23 | Intel Corporation | Method and circuitry for generating a safe address transition pulse in a memory device |
KR100221086B1 (ko) * | 1996-01-17 | 1999-09-15 | 윤종용 | 모뎀의 신호 안정화 통화 유지 장치 |
KR19980051638A (ko) * | 1996-12-23 | 1998-09-25 | 김광호 | 신호감시회로 |
US6134252A (en) * | 1997-04-11 | 2000-10-17 | Advanced Micro Devices, Inc. | Enhanced glitch removal circuit |
DE19733733C2 (de) * | 1997-08-04 | 1999-09-02 | Siemens Ag | Verfahren und Schaltungsanordnung zur Bearbeitung digitaler Signale |
US20050238539A1 (en) * | 2004-04-01 | 2005-10-27 | Gal Shafirstein | Apparatus for automated fresh tissue sectioning |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CH533926A (de) * | 1971-01-22 | 1973-02-15 | Dixi Sa | Entstörschaltung für logische Signale und Verfahren zum Betriebe derselben |
US3725792A (en) * | 1972-01-07 | 1973-04-03 | Tektronix Inc | Jitter-free trigger control circuit |
JPS5245859A (en) * | 1975-10-08 | 1977-04-11 | Seiko Epson Corp | Input circuit |
JPS567520A (en) * | 1979-07-02 | 1981-01-26 | Mitsubishi Electric Corp | Chattering rejection circuit |
JPS5685929A (en) * | 1979-12-15 | 1981-07-13 | Casio Comput Co Ltd | Switch circuit |
US4506165A (en) * | 1982-06-30 | 1985-03-19 | At&T Bell Laboratories | Noise rejection Set-Reset Flip-Flop circuitry |
-
1987
- 1987-12-14 IT IT8722987A patent/IT1233424B/it active
-
1988
- 1988-12-02 DE DE8888120115T patent/DE3866685D1/de not_active Expired - Fee Related
- 1988-12-02 US US07/279,036 patent/US4883993A/en not_active Expired - Lifetime
- 1988-12-02 EP EP88120115A patent/EP0320711B1/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
EP0320711A2 (en) | 1989-06-21 |
EP0320711B1 (en) | 1991-12-04 |
IT8722987A0 (it) | 1987-12-14 |
DE3866685D1 (de) | 1992-01-16 |
EP0320711A3 (en) | 1989-09-27 |
US4883993A (en) | 1989-11-28 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
TA | Fee payment date (situation as of event date), data collected since 19931001 |
Effective date: 19961227 |