IT1216476B - Processo per l'ottenimento di transitori a canale n per alta tensione, particolarmente per memorie eeprom con tecnologia cmos. - Google Patents

Processo per l'ottenimento di transitori a canale n per alta tensione, particolarmente per memorie eeprom con tecnologia cmos.

Info

Publication number
IT1216476B
IT1216476B IT8819580A IT1958088A IT1216476B IT 1216476 B IT1216476 B IT 1216476B IT 8819580 A IT8819580 A IT 8819580A IT 1958088 A IT1958088 A IT 1958088A IT 1216476 B IT1216476 B IT 1216476B
Authority
IT
Italy
Prior art keywords
transitors
obtaining
channel
high voltage
cmos technology
Prior art date
Application number
IT8819580A
Other languages
English (en)
Other versions
IT8819580A0 (it
Inventor
Carlo Riva
Original Assignee
Sgs Thomson Microelectronics
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sgs Thomson Microelectronics filed Critical Sgs Thomson Microelectronics
Priority to IT8819580A priority Critical patent/IT1216476B/it
Publication of IT8819580A0 publication Critical patent/IT8819580A0/it
Priority to EP89200327A priority patent/EP0331223B1/en
Priority to DE68922641T priority patent/DE68922641T2/de
Priority to JP1040447A priority patent/JP2554929B2/ja
Application granted granted Critical
Publication of IT1216476B publication Critical patent/IT1216476B/it
Priority to US07/604,995 priority patent/US5086008A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66659—Lateral single gate silicon transistors with asymmetry in the channel direction, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • H01L29/7835—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Non-Volatile Memory (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
IT8819580A 1988-02-29 1988-02-29 Processo per l'ottenimento di transitori a canale n per alta tensione, particolarmente per memorie eeprom con tecnologia cmos. IT1216476B (it)

Priority Applications (5)

Application Number Priority Date Filing Date Title
IT8819580A IT1216476B (it) 1988-02-29 1988-02-29 Processo per l'ottenimento di transitori a canale n per alta tensione, particolarmente per memorie eeprom con tecnologia cmos.
EP89200327A EP0331223B1 (en) 1988-02-29 1989-02-13 Process for obtaining high-voltage N channel transistors particularly for EEPROM memories with CMOS technology
DE68922641T DE68922641T2 (de) 1988-02-29 1989-02-13 Verfahren zur Herstellung eines N-Kanal-Transistors für Hochspannung, insbesondere für EEPROM-Speicher mit CMOS-Technologie.
JP1040447A JP2554929B2 (ja) 1988-02-29 1989-02-22 高電圧ｎチャンネルトランジスターの製造方法
US07/604,995 US5086008A (en) 1988-02-29 1990-10-29 Process for obtaining high-voltage N channel transistors particularly for EEPROM memories with CMOS technology

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT8819580A IT1216476B (it) 1988-02-29 1988-02-29 Processo per l'ottenimento di transitori a canale n per alta tensione, particolarmente per memorie eeprom con tecnologia cmos.

Publications (2)

Publication Number Publication Date
IT8819580A0 IT8819580A0 (it) 1988-02-29
IT1216476B true IT1216476B (it) 1990-03-08

Family

ID=11159211

Family Applications (1)

Application Number Title Priority Date Filing Date
IT8819580A IT1216476B (it) 1988-02-29 1988-02-29 Processo per l'ottenimento di transitori a canale n per alta tensione, particolarmente per memorie eeprom con tecnologia cmos.

Country Status (4)

Country Link
EP (1) EP0331223B1 (it)
JP (1) JP2554929B2 (it)
DE (1) DE68922641T2 (it)
IT (1) IT1216476B (it)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100331127B1 (ko) * 1994-02-15 2002-10-18 내셔널 세미콘덕터 코포레이션 표준cmos공정용고전압cmos트랜지스터
JP2007218716A (ja) * 2006-02-16 2007-08-30 Matsushita Electric Ind Co Ltd 細胞電気生理センサ

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5947757A (ja) * 1982-09-10 1984-03-17 Hitachi Ltd 半導体集積回路装置とその製造法
KR910006249B1 (ko) * 1983-04-01 1991-08-17 가부시기가이샤 히다찌세이사꾸쇼 반도체 장치
US4577391A (en) * 1984-07-27 1986-03-25 Monolithic Memories, Inc. Method of manufacturing CMOS devices
US4642878A (en) * 1984-08-28 1987-02-17 Kabushiki Kaisha Toshiba Method of making MOS device by sequentially depositing an oxidizable layer and a masking second layer over gated device regions
JPS61171165A (ja) * 1985-01-25 1986-08-01 Nissan Motor Co Ltd Ｍｏｓトランジスタ

Also Published As

Publication number Publication date
DE68922641T2 (de) 1996-02-08
EP0331223A3 (en) 1991-01-16
JP2554929B2 (ja) 1996-11-20
DE68922641D1 (de) 1995-06-22
IT8819580A0 (it) 1988-02-29
JPH027560A (ja) 1990-01-11
EP0331223A2 (en) 1989-09-06
EP0331223B1 (en) 1995-05-17

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Legal Events

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TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19970227