IT1206469B - Procedimento per fabbricare un dispositivo a circuito integrato a semiconduttori. - Google Patents
Procedimento per fabbricare un dispositivo a circuito integrato a semiconduttori.Info
- Publication number
- IT1206469B IT1206469B IT8423631A IT2363184A IT1206469B IT 1206469 B IT1206469 B IT 1206469B IT 8423631 A IT8423631 A IT 8423631A IT 2363184 A IT2363184 A IT 2363184A IT 1206469 B IT1206469 B IT 1206469B
- Authority
- IT
- Italy
- Prior art keywords
- procedure
- manufacturing
- integrated circuit
- semiconductor integrated
- circuit device
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/5329—Insulating materials
- H01L23/53295—Stacked insulating layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Local Oxidation Of Silicon (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58216319A JPS60109250A (ja) | 1983-11-18 | 1983-11-18 | 半導体集積回路装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| IT8423631A0 IT8423631A0 (it) | 1984-11-16 |
| IT1206469B true IT1206469B (it) | 1989-04-27 |
Family
ID=16686661
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IT8423631A IT1206469B (it) | 1983-11-18 | 1984-11-16 | Procedimento per fabbricare un dispositivo a circuito integrato a semiconduttori. |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JPS60109250A (it) |
| IT (1) | IT1206469B (it) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0828419B2 (ja) * | 1986-02-20 | 1996-03-21 | 富士通株式会社 | 配線構造 |
-
1983
- 1983-11-18 JP JP58216319A patent/JPS60109250A/ja active Pending
-
1984
- 1984-11-16 IT IT8423631A patent/IT1206469B/it active
Also Published As
| Publication number | Publication date |
|---|---|
| IT8423631A0 (it) | 1984-11-16 |
| JPS60109250A (ja) | 1985-06-14 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| IT1168294B (it) | Procedimento per fabbricare un dispositivo a circuito integrato a semiconduttori | |
| IT8221971A0 (it) | Dispositivo a circuito integrato a semiconduttori. | |
| IT8124892A0 (it) | Dispositivo a circuito integrato a semiconduttori. | |
| IT8421908A0 (it) | Dispositivo a circuito integrato a semiconduttore. | |
| IT8322777A0 (it) | Dispositivo a circuito integrato a semiconduttori e procedimento per la sua fabbricazione. | |
| IT8124940A0 (it) | Circuito integrato a semiconduttori. | |
| KR850004353A (ko) | 반도체 집적회로 장치의 제조방법 | |
| IT8322946A0 (it) | Circuito di protezione per dispositivi a circuito integrato. | |
| IT8423138A0 (it) | Dispositivo a circuito integrato a semiconduttori e procedimento di fabbricazione di esso. | |
| IT8025539A0 (it) | Dispositivo avente un circuito integrato a semiconduttori. | |
| DE3479943D1 (de) | A masterslice semiconductor device | |
| IT8224203A0 (it) | Dispositivo a circuito integrato a semiconduttori. | |
| IT8124559A0 (it) | Procedimento per la fabbricazione di un dispositivo a circuito integrato. | |
| IT8322981A0 (it) | Procedimento per la fabbricazione di un dispositivo a semiconduttori. | |
| FR2553542B1 (fr) | Circuit integre a semi-conducteurs | |
| IT8322558A0 (it) | Dispositivo a circuito integrato a semiconduttore e procedimento per la sua fabbricazione. | |
| IT8020126A0 (it) | Circuito integrato a semiconduttori. | |
| IT8122142A0 (it) | Dispositivo a circuito integrato a semiconduttori. | |
| IT8223283A0 (it) | Dispositivo a circuito integrato a semiconduttori. | |
| IT8124890A0 (it) | Dispositivo a circuito integrato a semiconduttori. | |
| IT8125408A0 (it) | Dispositivo a circuito integrato a semiconduttori. | |
| IT8125474A0 (it) | Procedimento per la fabbricazione di un dispositivo a circuito integrato. | |
| DE3485520D1 (de) | Herstellungsverfahren fuer halbleitervorrichtung. | |
| IT8221430A0 (it) | Procedimento per la fabbricazione di un dispositivo a semiconduttori. | |
| IT8125073A0 (it) | Dispositivi a circuito integrato a semiconduttori e procedimento per la sua fabbricazione. |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| TA | Fee payment date (situation as of event date), data collected since 19931001 |
Effective date: 19951128 |