IT1174192B - MOSFET MANUFACTURING METHOD - Google Patents

MOSFET MANUFACTURING METHOD

Info

Publication number
IT1174192B
IT1174192B IT8421384A IT2138484A IT1174192B IT 1174192 B IT1174192 B IT 1174192B IT 8421384 A IT8421384 A IT 8421384A IT 2138484 A IT2138484 A IT 2138484A IT 1174192 B IT1174192 B IT 1174192B
Authority
IT
Italy
Prior art keywords
mosfet manufacturing
mosfet
manufacturing
Prior art date
Application number
IT8421384A
Other languages
Italian (it)
Other versions
IT8421384A0 (en
IT8421384A1 (en
Inventor
Alfred Charles Ipri
Lubomir Leon Jastrzebski
Original Assignee
Rca Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rca Corp filed Critical Rca Corp
Publication of IT8421384A0 publication Critical patent/IT8421384A0/en
Publication of IT8421384A1 publication Critical patent/IT8421384A1/en
Application granted granted Critical
Publication of IT1174192B publication Critical patent/IT1174192B/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639—Preparation of substrate for selective deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76294—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using selective deposition of single crystal silicon, i.e. SEG techniques
IT8421384A 1983-06-22 1984-06-13 MOSFET MANUFACTURING METHOD IT1174192B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US50680483A 1983-06-22 1983-06-22

Publications (3)

Publication Number Publication Date
IT8421384A0 IT8421384A0 (en) 1984-06-13
IT8421384A1 IT8421384A1 (en) 1985-12-13
IT1174192B true IT1174192B (en) 1987-07-01

Family

ID=24016078

Family Applications (1)

Application Number Title Priority Date Filing Date
IT8421384A IT1174192B (en) 1983-06-22 1984-06-13 MOSFET MANUFACTURING METHOD

Country Status (5)

Country Link
DE (1) DE3422495A1 (en)
FR (1) FR2549294A1 (en)
GB (1) GB2142185A (en)
IT (1) IT1174192B (en)
SE (1) SE8403302L (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4942449A (en) * 1988-03-28 1990-07-17 General Electric Company Fabrication method and structure for field isolation in field effect transistors on integrated circuit chips
KR890017771A (en) * 1988-05-20 1989-12-18 강진구 Semiconductor device manufacturing method
US5158907A (en) * 1990-08-02 1992-10-27 At&T Bell Laboratories Method for making semiconductor devices with low dislocation defects

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2059116C3 (en) * 1970-12-01 1974-11-21 Siemens Ag, 1000 Berlin Und 8000 Muenchen Method for manufacturing a semiconductor component
US3861968A (en) * 1972-06-19 1975-01-21 Ibm Method of fabricating integrated circuit device structure with complementary elements utilizing selective thermal oxidation and selective epitaxial deposition
EP0090642B1 (en) * 1982-03-31 1987-09-23 Kabushiki Kaisha Toshiba System for measuring interfloor traffic for group control of elevator cars

Also Published As

Publication number Publication date
DE3422495A1 (en) 1985-01-10
IT8421384A0 (en) 1984-06-13
SE8403302L (en) 1984-12-23
SE8403302D0 (en) 1984-06-20
IT8421384A1 (en) 1985-12-13
FR2549294A1 (en) 1985-01-18
GB8414923D0 (en) 1984-07-18
GB2142185A (en) 1985-01-09

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