IT1151056B - Processo perfeezionato per la fabbricazione di dispositivi non planari - Google Patents

Processo perfeezionato per la fabbricazione di dispositivi non planari

Info

Publication number
IT1151056B
IT1151056B IT20412/80A IT2041280A IT1151056B IT 1151056 B IT1151056 B IT 1151056B IT 20412/80 A IT20412/80 A IT 20412/80A IT 2041280 A IT2041280 A IT 2041280A IT 1151056 B IT1151056 B IT 1151056B
Authority
IT
Italy
Prior art keywords
manufacture
planar devices
process perfected
perfected
planar
Prior art date
Application number
IT20412/80A
Other languages
English (en)
Other versions
IT8020412A0 (it
Inventor
Fritz H Gaensslen
Eberhard A Spiller
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of IT8020412A0 publication Critical patent/IT8020412A0/it
Application granted granted Critical
Publication of IT1151056B publication Critical patent/IT1151056B/it

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/80Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
    • H01L29/812Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a Schottky gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Processing Of Solid Wastes (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
IT20412/80A 1979-04-09 1980-03-07 Processo perfeezionato per la fabbricazione di dispositivi non planari IT1151056B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/028,461 US4268952A (en) 1979-04-09 1979-04-09 Method for fabricating self-aligned high resolution non planar devices employing low resolution registration

Publications (2)

Publication Number Publication Date
IT8020412A0 IT8020412A0 (it) 1980-03-07
IT1151056B true IT1151056B (it) 1986-12-17

Family

ID=21843570

Family Applications (1)

Application Number Title Priority Date Filing Date
IT20412/80A IT1151056B (it) 1979-04-09 1980-03-07 Processo perfeezionato per la fabbricazione di dispositivi non planari

Country Status (5)

Country Link
US (1) US4268952A (it)
EP (1) EP0016968A1 (it)
JP (1) JPS55134981A (it)
CA (2) CA1126876A (it)
IT (1) IT1151056B (it)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5667974A (en) * 1979-10-26 1981-06-08 Ibm Method of manufacturing semiconductor device
US4324038A (en) * 1980-11-24 1982-04-13 Bell Telephone Laboratories, Incorporated Method of fabricating MOS field effect transistors
EP0055521B1 (en) * 1980-11-29 1985-05-22 Kabushiki Kaisha Toshiba Method of filling a groove in a semiconductor substrate
JPS5893351A (ja) * 1981-11-30 1983-06-03 Toshiba Corp 半導体装置及び製造方法
JPS598374A (ja) * 1982-07-05 1984-01-17 Matsushita Electronics Corp 縦型構造電界効果トランジスタの製造方法
US4586243A (en) * 1983-01-14 1986-05-06 General Motors Corporation Method for more uniformly spacing features in a semiconductor monolithic integrated circuit
US4544940A (en) * 1983-01-14 1985-10-01 General Motors Corporation Method for more uniformly spacing features in a lateral bipolar transistor

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3598664A (en) * 1964-12-29 1971-08-10 Texas Instruments Inc High frequency transistor and process for fabricating same
US3518509A (en) * 1966-06-17 1970-06-30 Int Standard Electric Corp Complementary field-effect transistors on common substrate by multiple epitaxy techniques
FR2157740B1 (it) * 1971-10-29 1976-10-29 Thomson Csf
US3968562A (en) * 1971-11-25 1976-07-13 U.S. Philips Corporation Method of manufacturing a semiconductor device
US4027380A (en) * 1974-06-03 1977-06-07 Fairchild Camera And Instrument Corporation Complementary insulated gate field effect transistor structure and process for fabricating the structure
JPS52128078A (en) * 1976-04-21 1977-10-27 Mitsubishi Electric Corp Manufacture of field effect transistor
JPS53125778A (en) * 1977-04-08 1978-11-02 Nec Corp Semiconductor device
JPS5423479A (en) * 1977-07-25 1979-02-22 Agency Of Ind Science & Technol Manufacture for field effect transistor of insulation gate type
DE2738008A1 (de) * 1977-08-23 1979-03-01 Siemens Ag Verfahren zum herstellen einer eintransistor-speicherzelle
US4145459A (en) * 1978-02-02 1979-03-20 Rca Corporation Method of making a short gate field effect transistor

Also Published As

Publication number Publication date
CA1126876A (en) 1982-06-29
JPS55134981A (en) 1980-10-21
CA1132146A (en) 1982-09-21
US4268952A (en) 1981-05-26
EP0016968A1 (en) 1980-10-15
IT8020412A0 (it) 1980-03-07

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