IT1138988B - Circuiteria di raccolta delle istruzioni per elaboratori - Google Patents
Circuiteria di raccolta delle istruzioni per elaboratoriInfo
- Publication number
- IT1138988B IT1138988B IT20093/81A IT2009381A IT1138988B IT 1138988 B IT1138988 B IT 1138988B IT 20093/81 A IT20093/81 A IT 20093/81A IT 2009381 A IT2009381 A IT 2009381A IT 1138988 B IT1138988 B IT 1138988B
- Authority
- IT
- Italy
- Prior art keywords
- circuiteria
- processors
- collection
- instructions
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3802—Instruction prefetching
- G06F9/3814—Implementation provisions of instruction buffers, e.g. prefetch buffer; banks
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
- G06F13/1678—Details of memory controller using bus width
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
- G06F9/30149—Instruction analysis, e.g. decoding, instruction word fields of variable length instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3802—Instruction prefetching
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/126,313 US4325118A (en) | 1980-03-03 | 1980-03-03 | Instruction fetch circuitry for computers |
Publications (2)
Publication Number | Publication Date |
---|---|
IT8120093A0 IT8120093A0 (it) | 1981-03-03 |
IT1138988B true IT1138988B (it) | 1986-09-17 |
Family
ID=22424135
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT20093/81A IT1138988B (it) | 1980-03-03 | 1981-03-03 | Circuiteria di raccolta delle istruzioni per elaboratori |
Country Status (6)
Country | Link |
---|---|
US (1) | US4325118A (it) |
JP (1) | JPS56137448A (it) |
DE (1) | DE3107568A1 (it) |
FR (1) | FR2477301A1 (it) |
GB (1) | GB2070825A (it) |
IT (1) | IT1138988B (it) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6037938B2 (ja) * | 1980-12-29 | 1985-08-29 | 富士通株式会社 | 情報処理装置 |
US4514804A (en) * | 1981-11-25 | 1985-04-30 | Nippon Electric Co., Ltd. | Information handling apparatus having a high speed instruction-executing function |
US4651276A (en) * | 1982-10-06 | 1987-03-17 | Mcdonnell Douglas Corporation | Computer read next instruction system |
US5117496A (en) * | 1988-05-23 | 1992-05-26 | Hewlett-Packard Company | Method for recording and replaying mouse commands by recording the commands and the identities of elements affected by the commands |
US5109332A (en) * | 1988-09-09 | 1992-04-28 | Compaq Computer Corporation | System for controlling the transferring of different widths of data using two different sets of address control and state information signals |
JPH03102483A (ja) * | 1989-09-18 | 1991-04-26 | Hitachi Ltd | 自動車用組込み形1チップマイコン、プログラム開発装置 |
US5278974A (en) * | 1989-12-04 | 1994-01-11 | Digital Equipment Corporation | Method and apparatus for the dynamic adjustment of data transfer timing to equalize the bandwidths of two buses in a computer system having different bandwidths |
DE69326066T2 (de) * | 1992-03-25 | 2000-03-30 | Zilog Inc | Schnelle befehlsdekodierung in einem pipeline-prozessor |
JP3454294B2 (ja) * | 1994-06-20 | 2003-10-06 | インターナショナル・ビジネス・マシーンズ・コーポレーション | マルチプル・バス情報処理システム及びブリッジ回路 |
DE69734399D1 (de) * | 1996-01-24 | 2006-03-02 | Sun Microsystems Inc | Verfahren und vorrichtung zur stapel-cachespeicherung |
EP0976029A2 (en) * | 1996-01-24 | 2000-02-02 | Sun Microsystems, Inc. | A processor for executing instruction sets received from a network or from a local memory |
US6643760B2 (en) * | 2001-04-30 | 2003-11-04 | Zilog, Inc. | Architecture to relax memory performance requirements |
US7558900B2 (en) * | 2004-09-27 | 2009-07-07 | Winbound Electronics Corporation | Serial flash semiconductor memory |
US7689735B2 (en) * | 2005-10-03 | 2010-03-30 | Arm Limited | Instruction stream control |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3228005A (en) * | 1960-12-30 | 1966-01-04 | Ibm | Apparatus for manipulating data on a byte basis |
FR1536616A (fr) | 1966-09-21 | Ibm | Système de traitement d'instructions avec des perfectionnements pour le branchementet les boucles du programme | |
NL149925C (it) | 1968-10-25 | 1976-06-15 | ||
US4109310A (en) * | 1973-08-06 | 1978-08-22 | Xerox Corporation | Variable field length addressing system having data byte interchange |
US3978456A (en) * | 1974-12-16 | 1976-08-31 | Bell Telephone Laboratories, Incorporated | Byte-by-byte type processor circuit |
DE2557787C2 (de) | 1975-12-22 | 1982-09-09 | Siemens AG, 1000 Berlin und 8000 München | Vorausladeeinrichtung zum mikroprogrammierten und verdeckten Bereitstellen von Maschinenbefehlen unterschiedlichen Formats in einem Prozessor eines datenverarbeitenden Systems |
US4099229A (en) * | 1977-02-14 | 1978-07-04 | The United States Of America As Represented By The Secretary Of The Navy | Variable architecture digital computer |
JPS54122042A (en) * | 1978-03-15 | 1979-09-21 | Toshiba Corp | Electronic computer |
US4236206A (en) * | 1978-10-25 | 1980-11-25 | Digital Equipment Corporation | Central processor unit for executing instructions of variable length |
-
1980
- 1980-03-03 US US06/126,313 patent/US4325118A/en not_active Expired - Lifetime
-
1981
- 1981-02-27 DE DE3107568A patent/DE3107568A1/de not_active Withdrawn
- 1981-03-02 GB GB8106538A patent/GB2070825A/en not_active Withdrawn
- 1981-03-03 JP JP3041081A patent/JPS56137448A/ja active Pending
- 1981-03-03 FR FR8104228A patent/FR2477301A1/fr not_active Withdrawn
- 1981-03-03 IT IT20093/81A patent/IT1138988B/it active
Also Published As
Publication number | Publication date |
---|---|
GB2070825A (en) | 1981-09-09 |
DE3107568A1 (de) | 1982-03-25 |
US4325118A (en) | 1982-04-13 |
JPS56137448A (en) | 1981-10-27 |
FR2477301A1 (fr) | 1981-09-04 |
IT8120093A0 (it) | 1981-03-03 |
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