IT1075058B - Sistema per il reperimento di dati,insensibile a deviazioni di frequenza - Google Patents

Sistema per il reperimento di dati,insensibile a deviazioni di frequenza

Info

Publication number
IT1075058B
IT1075058B IT19420/77A IT1942077A IT1075058B IT 1075058 B IT1075058 B IT 1075058B IT 19420/77 A IT19420/77 A IT 19420/77A IT 1942077 A IT1942077 A IT 1942077A IT 1075058 B IT1075058 B IT 1075058B
Authority
IT
Italy
Prior art keywords
divert
insensitive
frequency
data finding
finding
Prior art date
Application number
IT19420/77A
Other languages
English (en)
Original Assignee
Sperry Rand Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sperry Rand Corp filed Critical Sperry Rand Corp
Application granted granted Critical
Publication of IT1075058B publication Critical patent/IT1075058B/it

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/0807—Details of the phase-locked loop concerning mainly a recovery circuit for the reference signal
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4904—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using self-synchronising codes, e.g. split-phase codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Dc Digital Transmission (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
IT19420/77A 1976-01-29 1977-01-18 Sistema per il reperimento di dati,insensibile a deviazioni di frequenza IT1075058B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/653,410 US4017803A (en) 1976-01-29 1976-01-29 Data recovery system resistant to frequency deviations

Publications (1)

Publication Number Publication Date
IT1075058B true IT1075058B (it) 1985-04-22

Family

ID=24620771

Family Applications (1)

Application Number Title Priority Date Filing Date
IT19420/77A IT1075058B (it) 1976-01-29 1977-01-18 Sistema per il reperimento di dati,insensibile a deviazioni di frequenza

Country Status (9)

Country Link
US (1) US4017803A (it)
JP (1) JPS5294112A (it)
CA (1) CA1051528A (it)
CH (1) CH620068A5 (it)
DE (1) DE2703395C3 (it)
ES (1) ES455336A1 (it)
FR (1) FR2340000A1 (it)
GB (1) GB1565245A (it)
IT (1) IT1075058B (it)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2748075C3 (de) * 1977-10-26 1980-08-07 Siemens Ag, 1000 Berlin Und 8000 Muenchen Phasenregelkreis
DE2823343B1 (de) * 1978-05-29 1979-08-16 Siemens Ag Verfahren und Anordnung zur Taktsignalrueckgewinnung bei digitaler Signaluebertragung
US4222009A (en) * 1978-11-02 1980-09-09 Sperry Corporation Phase lock loop preconditioning circuit
US4357707A (en) * 1979-04-11 1982-11-02 Pertec Computer Corporation Digital phase lock loop for flexible disk data recovery system
EP0023783A1 (en) * 1979-07-19 1981-02-11 Exxon Research And Engineering Company Data recovery circuit
US4339823A (en) * 1980-08-15 1982-07-13 Motorola, Inc. Phase corrected clock signal recovery circuit
US4400667A (en) * 1981-01-12 1983-08-23 Sangamo Weston, Inc. Phase tolerant bit synchronizer for digital signals
US4371974A (en) * 1981-02-25 1983-02-01 Rockwell International Corporation NRZ Data phase detector
US4456890A (en) * 1982-04-05 1984-06-26 Computer Peripherals Inc. Data tracking clock recovery system using digitally controlled oscillator
JPS58182323A (ja) * 1982-04-20 1983-10-25 Nec Corp 位相同期回路
BE895439R (nl) * 1982-12-22 1983-06-22 Int Standard Electric Corp Impulscorrectieketen en schakelingen die er gebruik van maken
US4556866A (en) * 1983-03-16 1985-12-03 Honeywell Inc. Power line carrier FSK data system
US4547738A (en) * 1983-06-10 1985-10-15 American Standard Inc. Phase shift demodulator
NL8401310A (nl) * 1984-04-24 1985-11-18 Philips Nv Inrichting voor het opwekken van een kloksignaal.
US4682343A (en) * 1984-09-11 1987-07-21 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration Processing circuit with asymmetry corrector and convolutional encoder for digital data
US4633488A (en) * 1984-11-13 1986-12-30 Digital Equipment Corporation Phase-locked loop for MFM data recording
US4847876A (en) * 1986-12-31 1989-07-11 Raytheon Company Timing recovery scheme for burst communication systems
US4879730A (en) * 1988-05-31 1989-11-07 Siemens Transmission Systems, Inc. Jitter tolerant circuit for dual rail data
JP2512786B2 (ja) * 1988-07-18 1996-07-03 富士通株式会社 位相整合回路
US4975930A (en) * 1988-11-02 1990-12-04 Digital Equipment Corporation Digital phase locked loop
US5579348A (en) * 1994-02-02 1996-11-26 Gi Corporation Method and apparatus for improving the apparent accuracy of a data receiver clock circuit
US5892797A (en) * 1996-07-17 1999-04-06 Jay Deng System and method for recovering data encoded using manchester code and other bi-phase level codes

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3825844A (en) * 1972-10-18 1974-07-23 Peripherals General Inc System for recovering phase shifted data pulses

Also Published As

Publication number Publication date
ES455336A1 (es) 1978-01-01
FR2340000B1 (it) 1982-12-31
CH620068A5 (it) 1980-10-31
US4017803A (en) 1977-04-12
GB1565245A (en) 1980-04-16
CA1051528A (en) 1979-03-27
JPS5294112A (en) 1977-08-08
DE2703395C3 (de) 1978-11-23
DE2703395A1 (de) 1977-08-04
DE2703395B2 (de) 1978-03-23
FR2340000A1 (fr) 1977-08-26
JPS6227470B2 (it) 1987-06-15

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