IT1044032B - Procedimento per fabbricare un cablaggio elettrico multichip - Google Patents
Procedimento per fabbricare un cablaggio elettrico multichipInfo
- Publication number
- IT1044032B IT1044032B IT26849/75A IT2684975A IT1044032B IT 1044032 B IT1044032 B IT 1044032B IT 26849/75 A IT26849/75 A IT 26849/75A IT 2684975 A IT2684975 A IT 2684975A IT 1044032 B IT1044032 B IT 1044032B
- Authority
- IT
- Italy
- Prior art keywords
- multichip
- procedure
- making
- electrical wiring
- wiring
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5383—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5384—Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
- H05K1/114—Pad being close to via, but not surrounding the via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3452—Solder masks
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
- H05K3/4061—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in inorganic insulating substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/426—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates without metal
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0347—Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
- H05K2201/2081—Compound repelling a metal, e.g. solder
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0502—Patterning and lithography
- H05K2203/0542—Continuous temporary metal layer over metal pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
- H05K2203/0723—Electroplating, e.g. finish plating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/245—Reinforcing conductive patterns made by printing techniques or by other techniques for applying conductive pastes, inks or powders; Reinforcing other conductive patterns by such techniques
- H05K3/246—Reinforcing conductive paste, ink or powder patterns by other methods, e.g. by plating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/388—Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
- H05K3/4605—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated made from inorganic insulating material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4664—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
- H05K3/4667—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders characterized by using an inorganic intermediate insulating layer
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19742443287 DE2443287C3 (de) | 1974-09-10 | Verfahren zum Herstellen einer Multichip-Verdrahtung |
Publications (1)
Publication Number | Publication Date |
---|---|
IT1044032B true IT1044032B (it) | 1980-02-29 |
Family
ID=5925331
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT26849/75A IT1044032B (it) | 1974-09-10 | 1975-09-03 | Procedimento per fabbricare un cablaggio elettrico multichip |
Country Status (8)
Country | Link |
---|---|
US (1) | US4047290A (it) |
JP (1) | JPS5836515B2 (it) |
BE (1) | BE833267A (it) |
CA (1) | CA1041207A (it) |
FR (1) | FR2285048A1 (it) |
GB (1) | GB1485569A (it) |
IT (1) | IT1044032B (it) |
NL (1) | NL7510293A (it) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4303798A (en) * | 1979-04-27 | 1981-12-01 | Kollmorgen Technologies Corporation | Heat shock resistant printed circuit board assemblies |
US4336088A (en) * | 1980-06-30 | 1982-06-22 | International Business Machines Corp. | Method of fabricating an improved multi-layer ceramic substrate |
US4302625A (en) * | 1980-06-30 | 1981-11-24 | International Business Machines Corp. | Multi-layer ceramic substrate |
US4544577A (en) * | 1984-04-26 | 1985-10-01 | E. F. Johnson Company | Process for metallization of dielectric substrate through holes |
US4617730A (en) * | 1984-08-13 | 1986-10-21 | International Business Machines Corporation | Method of fabricating a chip interposer |
EP0196865B1 (en) * | 1985-03-27 | 1990-09-12 | Ibiden Co, Ltd. | Electronic circuit substrates |
DE3685647T2 (de) * | 1985-07-16 | 1993-01-07 | Nippon Telegraph & Telephone | Verbindungskontakte zwischen substraten und verfahren zur herstellung derselben. |
GB2188194A (en) * | 1986-03-21 | 1987-09-23 | Plessey Co Plc | Carrier for high frequency integrated circuits |
US4942076A (en) * | 1988-11-03 | 1990-07-17 | Micro Substrates, Inc. | Ceramic substrate with metal filled via holes for hybrid microcircuits and method of making the same |
DE4318339A1 (de) * | 1993-06-02 | 1994-12-08 | Philips Patentverwaltung | Verschlossene Durchkontaktierung für ein Keramiksubstrat einer Dickschichtschaltung und ein Verfahren zur Herstellung derselben |
US5527999A (en) * | 1995-02-21 | 1996-06-18 | Delco Electronics Corp. | Multilayer conductor for printed circuits |
US6571468B1 (en) * | 2001-02-26 | 2003-06-03 | Saturn Electronics & Engineering, Inc. | Traceless flip chip assembly and method |
US7377032B2 (en) * | 2003-11-21 | 2008-05-27 | Mitsui Mining & Smelting Co., Ltd. | Process for producing a printed wiring board for mounting electronic components |
DE102004030800B4 (de) | 2004-06-25 | 2017-05-18 | Epcos Ag | Verfahren zur Herstellung einer keramischen Leiterplatte |
US20130216779A1 (en) | 2012-02-16 | 2013-08-22 | University Of Tennessee Research Foundation | Nanostructures from Laser-Ablated Nanohole Templates |
WO2017044898A1 (en) | 2015-09-11 | 2017-03-16 | Ultra Small Fibers, LLC | Tunable nanofiber filter media and filter devices |
EP3419390A1 (en) * | 2017-06-21 | 2018-12-26 | Heraeus Deutschland GmbH & Co. KG | Thick-film paste mediated ceramics bonded with metal or metal hybrid foils and vias |
CN113316309A (zh) * | 2021-04-23 | 2021-08-27 | 厦门理工学院 | 柔性线路板及其制备方法、装置以及计算机设备 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3756891A (en) * | 1967-12-26 | 1973-09-04 | Multilayer circuit board techniques | |
US3672986A (en) * | 1969-12-19 | 1972-06-27 | Day Co Nv | Metallization of insulating substrates |
GB1294373A (en) * | 1970-03-18 | 1972-10-25 | Ici Ltd | Electrodes for electrochemical processes |
US3619725A (en) * | 1970-04-08 | 1971-11-09 | Rca Corp | Electrical fuse link |
GB1378520A (en) * | 1971-05-10 | 1974-12-27 | Atomic Energy Authority Uk | Metallising pastes |
US3808681A (en) * | 1971-08-31 | 1974-05-07 | A Stricker | Automatic pin insertion and bonding to a metallized pad on a substrate surface |
US3808049A (en) * | 1972-06-02 | 1974-04-30 | Microsystems Int Ltd | Multi-layer thin-film circuits |
US3934336A (en) * | 1975-01-13 | 1976-01-27 | Burroughs Corporation | Electronic package assembly with capillary bridging connection |
-
1975
- 1975-08-27 GB GB35275/75A patent/GB1485569A/en not_active Expired
- 1975-09-01 NL NL7510293A patent/NL7510293A/xx not_active Application Discontinuation
- 1975-09-02 US US05/609,687 patent/US4047290A/en not_active Expired - Lifetime
- 1975-09-03 IT IT26849/75A patent/IT1044032B/it active
- 1975-09-04 FR FR7527143A patent/FR2285048A1/fr active Granted
- 1975-09-09 CA CA235,058A patent/CA1041207A/en not_active Expired
- 1975-09-10 JP JP50109883A patent/JPS5836515B2/ja not_active Expired
- 1975-09-10 BE BE159910A patent/BE833267A/xx not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
GB1485569A (en) | 1977-09-14 |
US4047290A (en) | 1977-09-13 |
JPS5836515B2 (ja) | 1983-08-09 |
JPS5153267A (it) | 1976-05-11 |
BE833267A (fr) | 1975-12-31 |
NL7510293A (nl) | 1976-03-12 |
DE2443287A1 (de) | 1976-03-18 |
CA1041207A (en) | 1978-10-24 |
DE2443287B2 (de) | 1977-03-24 |
FR2285048A1 (fr) | 1976-04-09 |
FR2285048B1 (it) | 1980-04-30 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
USRE29513F1 (en) | Electrical connection apparatus | |
AR209127A1 (es) | Un dispositivo conectador electrico | |
IT1028046B (it) | Contatto elettrico per cavo a a conduttori piatti | |
IT1044032B (it) | Procedimento per fabbricare un cablaggio elettrico multichip | |
IT1038069B (it) | Connettori elettrici perefezionati | |
JPS57136344A (en) | Device used for producing semiconductor device | |
SE7501079L (sv) | Elektriskt anslutningsdon for antiimkretsar | |
ES209600Y (es) | Un conjunto de conectador electrico. | |
AU7808975A (en) | Lay-in duct for electrical wiring | |
SE7504694L (sv) | Kabelgenomforing | |
IL47367A0 (en) | Apparatus for bonding electrical conductors | |
IT1039205B (it) | Procedimento per drogare unostrato semiconduttore | |
AU8039475A (en) | A post for alignaling cables | |
IT1051746B (it) | Cavo elettrico | |
IT1033295B (it) | Procedimento per fabbricare un dispositivo a semiconduttori | |
BR7507737A (pt) | Dispositivo sensivel a intensidade eletrica | |
IT1044035B (it) | Procedimento per fabbricare un cablaggio elettrico multichip | |
IT1039921B (it) | Procedimento per fabbricare undispositivo a semiconduttori | |
SE400409B (sv) | Hallare for elkabel | |
AU8392475A (en) | Semiconductor devices | |
IT1030431B (it) | Connessione elettrica | |
SE414354B (sv) | Forfarande for tillverkning av en i lengdriktningen vattentet telekommunikationskabel | |
CH612033A5 (en) | Electrical cable | |
SE396859B (sv) | Vertikal elektrisk maskin | |
DK339375A (da) | Vevet elektrisk forbindelsesemne |