IT1027900B - Disposizione circultale per apparecchi elaboratori di dati - Google Patents

Disposizione circultale per apparecchi elaboratori di dati

Info

Publication number
IT1027900B
IT1027900B IT30845/74A IT3084574A IT1027900B IT 1027900 B IT1027900 B IT 1027900B IT 30845/74 A IT30845/74 A IT 30845/74A IT 3084574 A IT3084574 A IT 3084574A IT 1027900 B IT1027900 B IT 1027900B
Authority
IT
Italy
Prior art keywords
provision
circular
data processing
processing equipment
equipment
Prior art date
Application number
IT30845/74A
Other languages
English (en)
Original Assignee
Olympia Werke Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Olympia Werke Ag filed Critical Olympia Werke Ag
Application granted granted Critical
Publication of IT1027900B publication Critical patent/IT1027900B/it

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7839—Architectures of general purpose stored program computers comprising a single central processing unit with memory
    • G06F15/7864—Architectures of general purpose stored program computers comprising a single central processing unit with memory on more than one IC chip
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Microcomputers (AREA)
  • Memory System (AREA)
IT30845/74A 1973-12-22 1974-12-20 Disposizione circultale per apparecchi elaboratori di dati IT1027900B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19732364254 DE2364254B2 (de) 1973-12-22 1973-12-22 Schaltungsanordnung fuer datenverarbeitende geraete

Publications (1)

Publication Number Publication Date
IT1027900B true IT1027900B (it) 1978-12-20

Family

ID=5901749

Family Applications (1)

Application Number Title Priority Date Filing Date
IT30845/74A IT1027900B (it) 1973-12-22 1974-12-20 Disposizione circultale per apparecchi elaboratori di dati

Country Status (7)

Country Link
US (1) US3975714A (it)
JP (1) JPS5440342B2 (it)
DE (1) DE2364254B2 (it)
FR (1) FR2255655B1 (it)
GB (1) GB1469299A (it)
IT (1) IT1027900B (it)
NL (1) NL166562C (it)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4086626A (en) * 1974-10-07 1978-04-25 Fairchild Camera And Instrument Corporation Microprocessor system
US4016545A (en) * 1975-07-31 1977-04-05 Harris Corporation Plural memory controller apparatus
GB1540923A (en) * 1975-12-01 1979-02-21 Intel Corp Programmable single chip mos computer
US4130868A (en) * 1977-04-12 1978-12-19 International Business Machines Corporation Independently controllable multiple address registers for a data processor
US4159541A (en) * 1977-07-01 1979-06-26 Ncr Corporation Minimum pin memory device
US4148099A (en) * 1978-04-11 1979-04-03 Ncr Corporation Memory device having a minimum number of pins
US4330823A (en) 1978-12-06 1982-05-18 Data General Corporation High speed compact digital computer system with segmentally stored microinstructions
US4286321A (en) * 1979-06-18 1981-08-25 International Business Machines Corporation Common bus communication system in which the width of the address field is greater than the number of lines on the bus
JPS5697145A (en) * 1979-12-29 1981-08-05 Advantest Corp Operation control device
FR2486269B1 (fr) * 1980-07-04 1986-03-28 Thomson Csf Systeme de traitement et de memorisation de donnees numeriques, notamment pour tomodensitometre, et tomodensitometre comportant un tel systeme
US4815034A (en) * 1981-03-18 1989-03-21 Mackey Timothy I Dynamic memory address system for I/O devices
US4532587A (en) * 1981-08-26 1985-07-30 Texas Instruments Incorporated Single chip processor connected to an external memory chip
JPS5960786A (ja) * 1982-09-30 1984-04-06 Fujitsu Ltd 半導体集積回路
DE3543911A1 (de) * 1984-12-14 1986-06-26 Mitsubishi Denki K.K., Tokio/Tokyo Digitale verzoegerungseinheit
DE3705864A1 (de) * 1986-02-24 1987-08-27 Ricoh Kk Integrierte schaltungskarte fuer eine datenverarbeitungseinrichtung
US5093807A (en) 1987-12-23 1992-03-03 Texas Instruments Incorporated Video frame storage system
US5587962A (en) * 1987-12-23 1996-12-24 Texas Instruments Incorporated Memory circuit accommodating both serial and random access including an alternate address buffer register
IL96808A (en) * 1990-04-18 1996-03-31 Rambus Inc Introductory / Origin Circuit Agreed Using High-Performance Brokerage
US5243703A (en) * 1990-04-18 1993-09-07 Rambus, Inc. Apparatus for synchronously generating clock signals in a data processing system
US6751696B2 (en) 1990-04-18 2004-06-15 Rambus Inc. Memory device having a programmable register
US5548775A (en) * 1993-12-30 1996-08-20 International Business Machines Corporation System and method for adaptive active monitoring of high speed data streams using finite state machines
FR2772948B1 (fr) * 1997-12-19 2000-03-10 Sgs Thomson Microelectronics Microcontroleur avec interface perfectionnee et procede d'utilisation
DE10343525B4 (de) * 2002-09-27 2011-06-16 Qimonda Ag Verfahren zum Betreiben von Halbleiterbausteinen, Steuervorrichtung für Halbleiterbausteine und Anordnung zum Betreiben von Speicherbausteinen
DE102004039422B4 (de) * 2004-08-13 2006-06-01 Infineon Technologies Ag Speicheranordnung, Verwendung der Speicheranordnung und Verfahren zum Speichern von Daten

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3691538A (en) * 1971-06-01 1972-09-12 Ncr Co Serial read-out memory system
US3757306A (en) * 1971-08-31 1973-09-04 Texas Instruments Inc Computing systems cpu
US3803562A (en) * 1972-11-21 1974-04-09 Honeywell Inf Systems Semiconductor mass memory
US3821715A (en) * 1973-01-22 1974-06-28 Intel Corp Memory system for a multi chip digital computer
US3855577A (en) * 1973-06-11 1974-12-17 Texas Instruments Inc Power saving circuit for calculator system

Also Published As

Publication number Publication date
JPS5096131A (it) 1975-07-31
FR2255655B1 (it) 1976-12-31
NL7416721A (nl) 1975-06-24
GB1469299A (en) 1977-04-06
FR2255655A1 (it) 1975-07-18
JPS5440342B2 (it) 1979-12-03
US3975714A (en) 1976-08-17
DE2364254A1 (de) 1975-06-26
DE2364254B2 (de) 1976-03-18
NL166562B (nl) 1981-03-16
NL166562C (nl) 1981-08-17

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