IN2014MN02332A - - Google Patents

Info

Publication number
IN2014MN02332A
IN2014MN02332A IN2332MUN2014A IN2014MN02332A IN 2014MN02332 A IN2014MN02332 A IN 2014MN02332A IN 2332MUN2014 A IN2332MUN2014 A IN 2332MUN2014A IN 2014MN02332 A IN2014MN02332 A IN 2014MN02332A
Authority
IN
India
Prior art keywords
data conduits
communications ports
networking
external computing
management module
Prior art date
Application number
Other languages
English (en)
Inventor
Matthew Hurd
Charles Thomas
David Snowdon
Scott Mcdaid
Original Assignee
Zomojo Pty Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zomojo Pty Ltd filed Critical Zomojo Pty Ltd
Publication of IN2014MN02332A publication Critical patent/IN2014MN02332A/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation
    • H04J3/0697—Synchronisation in a packet node
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06Q—INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
    • G06Q40/00—Finance; Insurance; Tax strategies; Processing of corporate or income taxes
    • G06Q40/04—Trading; Exchange, e.g. stocks, commodities, derivatives or currency exchange
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13352—Self-routing networks, real-time routing

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Communication Control (AREA)
IN2332MUN2014 2012-04-18 2013-04-18 IN2014MN02332A (enrdf_load_stackoverflow)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201261625946P 2012-04-18 2012-04-18
PCT/AU2013/000404 WO2013155566A1 (en) 2012-04-18 2013-04-18 A networking apparatus and a method for networking

Publications (1)

Publication Number Publication Date
IN2014MN02332A true IN2014MN02332A (enrdf_load_stackoverflow) 2015-08-14

Family

ID=49382713

Family Applications (1)

Application Number Title Priority Date Filing Date
IN2332MUN2014 IN2014MN02332A (enrdf_load_stackoverflow) 2012-04-18 2013-04-18

Country Status (9)

Country Link
US (1) US9612992B2 (enrdf_load_stackoverflow)
EP (1) EP2839621A4 (enrdf_load_stackoverflow)
JP (1) JP6386443B2 (enrdf_load_stackoverflow)
KR (1) KR20150003261A (enrdf_load_stackoverflow)
AU (1) AU2013248939B2 (enrdf_load_stackoverflow)
CA (1) CA2870483A1 (enrdf_load_stackoverflow)
IN (1) IN2014MN02332A (enrdf_load_stackoverflow)
SG (1) SG11201406659SA (enrdf_load_stackoverflow)
WO (1) WO2013155566A1 (enrdf_load_stackoverflow)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102002888B1 (ko) * 2013-11-05 2019-07-23 휴렛-팩커드 디벨롭먼트 컴퍼니, 엘.피. 전자 장치 및 전자 장치의 신호선 연결 상태 확인 방법
US9674118B2 (en) 2014-03-19 2017-06-06 xCelor LLC System and method for low-latency network data switching
WO2015179895A1 (en) * 2014-05-26 2015-12-03 Zomojo Pty Ltd A trading system
DE102016200964A1 (de) * 2016-01-25 2017-07-27 Siemens Aktiengesellschaft Verfahren zur Informationsübertragung in einem Kommunikationsnetz
US10936597B2 (en) 2017-11-21 2021-03-02 Gto Llc Systems and methods for generating customized filtered-and-partitioned market-data feeds
EP3973673A4 (en) 2019-05-22 2023-01-18 Cisco Technology, Inc. A networking apparatus and a method for networking
CN113364832B (zh) * 2021-04-26 2022-09-27 北京旷视科技有限公司 数据传输通道部署方法及装置、跨网数据传输方法及装置

Family Cites Families (23)

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JPH0828713B2 (ja) * 1993-05-19 1996-03-21 日本電気株式会社 クロスコネクト装置
JP2888291B2 (ja) * 1996-12-05 1999-05-10 日本電気株式会社 信号断検出回路
US6377575B1 (en) * 1998-08-05 2002-04-23 Vitesse Semiconductor Corporation High speed cross point switch routing circuit with word-synchronous serial back plane
US6310521B1 (en) 1999-12-23 2001-10-30 Cypress Semiconductor Corp. Reference-free clock generation and data recovery PLL
US6856600B1 (en) * 2000-01-04 2005-02-15 Cisco Technology, Inc. Method and apparatus for isolating faults in a switching matrix
US6243510B1 (en) * 2000-03-13 2001-06-05 Apcon, Inc. Electronically-controllable fiber optic patch panel
WO2002015489A2 (en) 2000-08-15 2002-02-21 Conexant Systems, Inc. Switches and routers, with parallel domains operating at a reduced speed
US6737958B1 (en) 2000-11-16 2004-05-18 Free Electron Technology Inc. Crosspoint switch with reduced power consumption
US6704882B2 (en) * 2001-01-22 2004-03-09 Mayo Foundation For Medical Education And Research Data bit-to-clock alignment circuit with first bit capture capability
US20020161912A1 (en) 2001-03-19 2002-10-31 Vasquez Silverio C. Ethernet cross point switch for connecting multiple network sections with different speeds within physical layer protocol
US9032097B2 (en) * 2001-04-26 2015-05-12 Nokia Corporation Data communication with remote network node
US7200153B2 (en) * 2001-09-20 2007-04-03 Intel Corporation Method and apparatus for autosensing LAN vs WAN to determine port type
WO2003096537A1 (en) * 2002-05-13 2003-11-20 Fairchild Semiconductor Corporation Cross point switch with serializer and deserializer functions
US20040081196A1 (en) * 2002-10-29 2004-04-29 Elliott Stephen J. Protocol independent hub
US7224184B1 (en) 2004-11-05 2007-05-29 Xilinx, Inc. High bandwidth reconfigurable on-chip network for reconfigurable systems
US20080192727A1 (en) 2007-02-09 2008-08-14 Remote Switch Systems Reconfiguration of Non-Fully Populated Switch Arrays
US20080240090A1 (en) * 2007-03-28 2008-10-02 Adc Dsl Systems, Inc. Programmable high speed crossbar switch
JP2008252753A (ja) * 2007-03-30 2008-10-16 Nec Corp セル処理装置、セルのスイッチ処理方法
JP5381089B2 (ja) * 2008-12-25 2014-01-08 富士通株式会社 光信号処理装置
US20120224804A1 (en) * 2009-11-04 2012-09-06 Yoshihito Hashimoto Semiconductor device and method of manufacturing the same
US8417867B2 (en) * 2010-11-17 2013-04-09 Xilinx, Inc. Multichip module for communications
US8743715B1 (en) * 2011-01-24 2014-06-03 OnPath Technologies Inc. Methods and systems for calibrating a network switch
WO2013134810A1 (en) 2012-03-12 2013-09-19 Zeptoip Pty Ltd A network device and a method for networking

Also Published As

Publication number Publication date
KR20150003261A (ko) 2015-01-08
AU2013248939A1 (en) 2014-01-23
EP2839621A1 (en) 2015-02-25
US20150046613A1 (en) 2015-02-12
WO2013155566A1 (en) 2013-10-24
EP2839621A4 (en) 2015-04-29
AU2013248939B2 (en) 2015-05-07
US9612992B2 (en) 2017-04-04
CA2870483A1 (en) 2013-10-24
JP2015518687A (ja) 2015-07-02
SG11201406659SA (en) 2014-11-27
JP6386443B2 (ja) 2018-09-05

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