IN2014MN01960A - - Google Patents

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Publication number
IN2014MN01960A
IN2014MN01960A IN1960MUN2014A IN2014MN01960A IN 2014MN01960 A IN2014MN01960 A IN 2014MN01960A IN 1960MUN2014 A IN1960MUN2014 A IN 1960MUN2014A IN 2014MN01960 A IN2014MN01960 A IN 2014MN01960A
Authority
IN
India
Prior art keywords
path
mtj
resistance
circuit
reference pair
Prior art date
Application number
Other languages
English (en)
Inventor
Xia Li
Jung Pill Kim
Taehyun Kim
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of IN2014MN01960A publication Critical patent/IN2014MN01960A/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/062—Differential amplifiers of non-latching type, e.g. comparators, long-tailed pairs
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165—Auxiliary circuits
    • G11C11/1673—Reading or sensing circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5642—Sensing or reading circuits; Data output circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Mram Or Spin Memory Techniques (AREA)
  • Hall/Mr Elements (AREA)
IN1960MUN2014 2012-05-04 2013-05-06 IN2014MN01960A (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/464,242 US9159381B2 (en) 2012-05-04 2012-05-04 Tunable reference circuit
PCT/US2013/039656 WO2013166479A1 (fr) 2012-05-04 2013-05-06 Circuit de référence accordable comprenant des éléments jonction tunnel magnétique pour circuit de mémoire à semi-conducteurs

Publications (1)

Publication Number Publication Date
IN2014MN01960A true IN2014MN01960A (fr) 2015-07-10

Family

ID=48521406

Family Applications (1)

Application Number Title Priority Date Filing Date
IN1960MUN2014 IN2014MN01960A (fr) 2012-05-04 2013-05-06

Country Status (6)

Country Link
US (1) US9159381B2 (fr)
EP (1) EP2845197B1 (fr)
JP (1) JP5908165B2 (fr)
CN (1) CN104272391B (fr)
IN (1) IN2014MN01960A (fr)
WO (1) WO2013166479A1 (fr)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013187193A1 (fr) * 2012-06-11 2013-12-19 日本電気株式会社 Élément de porte logique non volatil
US20140327508A1 (en) * 2013-05-06 2014-11-06 Qualcomm Incorporated Inductor tunable by a variable magnetic flux density component
US9336847B2 (en) 2014-04-21 2016-05-10 Qualcomm Incorporated Method and apparatus for generating a reference for use with a magnetic tunnel junction
US9691462B2 (en) 2014-09-27 2017-06-27 Qualcomm Incorporated Latch offset cancelation for magnetoresistive random access memory
JP2018147532A (ja) * 2017-03-03 2018-09-20 ソニーセミコンダクタソリューションズ株式会社 半導体記憶装置及び情報処理装置
US10431278B2 (en) * 2017-08-14 2019-10-01 Qualcomm Incorporated Dynamically controlling voltage for access operations to magneto-resistive random access memory (MRAM) bit cells to account for ambient temperature
US10790016B2 (en) * 2018-03-02 2020-09-29 Western Digital Technologies, Inc. Probabilistic neuron circuits
KR102097204B1 (ko) * 2018-05-04 2020-04-03 한양대학교 산학협력단 다중 기준 저항 레벨을 적용하는 자기 저항 메모리 소자 및 이에 있어서 최적 기준 저항 레벨을 선택하는 방법
CN110910924B (zh) * 2018-09-18 2021-09-14 联华电子股份有限公司 磁阻式随机存取存储器
US10803913B1 (en) * 2019-06-11 2020-10-13 Applied Materials, Inc. Narrow range sense amplifier with immunity to noise and variation
KR20220021075A (ko) 2020-08-12 2022-02-22 삼성전자주식회사 메모리 셀의 크기에 따른 최적의 프로그램 전압을 생성하는 메모리 장치
US11854590B2 (en) 2021-04-23 2023-12-26 Applied Materials, Inc. Reference generation for narrow-range sense amplifiers

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6331943B1 (en) * 2000-08-28 2001-12-18 Motorola, Inc. MTJ MRAM series-parallel architecture
US6721203B1 (en) 2001-02-23 2004-04-13 Western Digital (Fremont), Inc. Designs of reference cells for magnetic tunnel junction (MTJ) MRAM
JP4113423B2 (ja) * 2002-12-04 2008-07-09 シャープ株式会社 半導体記憶装置及びリファレンスセルの補正方法
US6807118B2 (en) 2003-01-23 2004-10-19 Hewlett-Packard Development Company, L.P. Adjustable offset differential amplifier
JP4334284B2 (ja) * 2003-06-26 2009-09-30 株式会社東芝 磁気ランダムアクセスメモリ
US7239537B2 (en) 2005-01-12 2007-07-03 International Business Machines Corporation Method and apparatus for current sense amplifier calibration in MRAM devices
US7321507B2 (en) * 2005-11-21 2008-01-22 Magic Technologies, Inc. Reference cell scheme for MRAM
JP5044432B2 (ja) * 2008-02-07 2012-10-10 株式会社東芝 抵抗変化メモリ
JP5676842B2 (ja) * 2008-05-30 2015-02-25 ピーエスフォー ルクスコ エスエイアールエルＰＳ４ Ｌｕｘｃｏ Ｓ．ａ．ｒ．ｌ． 半導体装置
US7813166B2 (en) 2008-06-30 2010-10-12 Qualcomm Incorporated Controlled value reference signal of resistance based memory circuit
US8203862B2 (en) 2008-10-10 2012-06-19 Seagate Technology Llc Voltage reference generation with selectable dummy regions
US7881094B2 (en) 2008-11-12 2011-02-01 Seagate Technology Llc Voltage reference generation for resistive sense memory cells
KR20100094167A (ko) 2009-02-18 2010-08-26 삼성전자주식회사 메모리 장치 및 이를 포함하는 모바일 장치
US8724414B2 (en) * 2010-02-09 2014-05-13 Qualcomm Incorporated System and method to select a reference cell
JP2012027974A (ja) * 2010-07-22 2012-02-09 Panasonic Corp 半導体記憶装置

Also Published As

Publication number Publication date
EP2845197A1 (fr) 2015-03-11
CN104272391A (zh) 2015-01-07
JP2015520908A (ja) 2015-07-23
WO2013166479A1 (fr) 2013-11-07
EP2845197B1 (fr) 2018-06-13
JP5908165B2 (ja) 2016-04-26
CN104272391B (zh) 2018-04-27
US20130293286A1 (en) 2013-11-07
US9159381B2 (en) 2015-10-13

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