IN2014MN01430A - - Google Patents

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Publication number
IN2014MN01430A
IN2014MN01430A IN1430MUN2014A IN2014MN01430A IN 2014MN01430 A IN2014MN01430 A IN 2014MN01430A IN 1430MUN2014 A IN1430MUN2014 A IN 1430MUN2014A IN 2014MN01430 A IN2014MN01430 A IN 2014MN01430A
Authority
IN
India
Prior art keywords
jitter amount
synchronization
jitter
frequency
error correction
Prior art date
Application number
Other languages
English (en)
Inventor
Osamu Matsunaga
Naoki Inomata
Mizuki Kanada
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of IN2014MN01430A publication Critical patent/IN2014MN01430A/en

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0602—Systems characterised by the synchronising information used
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0658—Clock or time synchronisation among packet nodes
    • H04J3/0661—Clock or time synchronisation among packet nodes using timestamps
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0016—Arrangements for synchronising receiver with transmitter correction of synchronization errors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
IN1430MUN2014 2012-01-30 2013-01-23 IN2014MN01430A (https=)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2012016548 2012-01-30
PCT/JP2013/051237 WO2013115016A1 (ja) 2012-01-30 2013-01-23 同期処理装置、同期処理方法、およびプログラム

Publications (1)

Publication Number Publication Date
IN2014MN01430A true IN2014MN01430A (https=) 2015-07-03

Family

ID=48905058

Family Applications (1)

Application Number Title Priority Date Filing Date
IN1430MUN2014 IN2014MN01430A (https=) 2012-01-30 2013-01-23

Country Status (7)

Country Link
US (1) US20150030038A1 (https=)
EP (1) EP2811684A1 (https=)
JP (1) JPWO2013115016A1 (https=)
CN (1) CN104067555A (https=)
BR (1) BR112014018147A8 (https=)
IN (1) IN2014MN01430A (https=)
WO (1) WO2013115016A1 (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102015209881A1 (de) * 2015-05-29 2016-12-01 A.RAYMOND et Cie. SCS Vorrichtung zum Halten eines Bauteils
JP6572851B2 (ja) * 2016-08-29 2019-09-11 トヨタ自動車株式会社 内燃機関のシリンダブロックおよびその製造方法
CN110536405B (zh) * 2018-05-25 2021-08-03 华为技术有限公司 一种同步方法及接入点
US11374645B1 (en) * 2022-01-26 2022-06-28 Emeric S. Bennett Communicating polarization-dependent information over a free space channel

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2400255A (en) 2003-03-31 2004-10-06 Sony Uk Ltd Video synchronisation
JP2007282093A (ja) * 2006-04-11 2007-10-25 Oki Electric Ind Co Ltd クロック信号発生装置及び方法
WO2009035091A1 (ja) * 2007-09-14 2009-03-19 Nec Corporation クロック同期システム、その方法及びそのプログラム
JP2010109586A (ja) * 2008-10-29 2010-05-13 Oki Networks Co Ltd クロック発生装置、クロック発生方法、通信装置、及び同期クロック伝送システム
US8731036B2 (en) * 2008-11-20 2014-05-20 Nec Corporation Packet filter-based clock synchronization system, apparatus, and method, and program thereof
JP5369814B2 (ja) 2009-03-26 2013-12-18 ソニー株式会社 受信装置および受信装置の時刻修正方法

Also Published As

Publication number Publication date
BR112014018147A2 (https=) 2017-06-20
EP2811684A1 (en) 2014-12-10
US20150030038A1 (en) 2015-01-29
JPWO2013115016A1 (ja) 2015-05-11
CN104067555A (zh) 2014-09-24
WO2013115016A1 (ja) 2013-08-08
BR112014018147A8 (pt) 2017-07-11

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