IN2012DN02977A - - Google Patents

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Publication number
IN2012DN02977A
IN2012DN02977A IN2977DEN2012A IN2012DN02977A IN 2012DN02977 A IN2012DN02977 A IN 2012DN02977A IN 2977DEN2012 A IN2977DEN2012 A IN 2977DEN2012A IN 2012DN02977 A IN2012DN02977 A IN 2012DN02977A
Authority
IN
India
Prior art keywords
data stream
write permission
prefetch unit
given data
response
Prior art date
Application number
Other languages
English (en)
Inventor
Benjamin T Sander
Bharath Narasimha Swamy
Swamy Punyamurtula
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of IN2012DN02977A publication Critical patent/IN2012DN02977A/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815—Cache consistency protocols
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60—Details of cache memory
    • G06F2212/6026—Prefetching based on access pattern detection, e.g. stride based prefetch

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
IN2977DEN2012 2009-09-11 2010-09-09 IN2012DN02977A (enExample)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/558,465 US8667225B2 (en) 2009-09-11 2009-09-11 Store aware prefetching for a datastream
PCT/US2010/048241 WO2011031837A1 (en) 2009-09-11 2010-09-09 Store aware prefetching for a datastream

Publications (1)

Publication Number Publication Date
IN2012DN02977A true IN2012DN02977A (enExample) 2015-07-31

Family

ID=43242176

Family Applications (1)

Application Number Title Priority Date Filing Date
IN2977DEN2012 IN2012DN02977A (enExample) 2009-09-11 2010-09-09

Country Status (7)

Country Link
US (1) US8667225B2 (enExample)
EP (1) EP2476060B1 (enExample)
JP (1) JP5615927B2 (enExample)
KR (1) KR101614867B1 (enExample)
CN (1) CN102640124B (enExample)
IN (1) IN2012DN02977A (enExample)
WO (1) WO2011031837A1 (enExample)

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US9311251B2 (en) 2012-08-27 2016-04-12 Apple Inc. System cache with sticky allocation
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KR101757098B1 (ko) 2014-12-14 2017-07-26 비아 얼라이언스 세미컨덕터 씨오., 엘티디. 메모리 액세스에 의한 효용성 기반 공격성 레벨 프리패칭
US9971694B1 (en) * 2015-06-24 2018-05-15 Apple Inc. Prefetch circuit for a processor with pointer optimization
US10324832B2 (en) * 2016-05-25 2019-06-18 Samsung Electronics Co., Ltd. Address based multi-stream storage device access
US11169925B2 (en) * 2015-08-25 2021-11-09 Samsung Electronics Co., Ltd. Capturing temporal store streams into CPU caches by dynamically varying store streaming thresholds
US10042749B2 (en) 2015-11-10 2018-08-07 International Business Machines Corporation Prefetch insensitive transactional memory
JP6734760B2 (ja) 2015-11-10 2020-08-05 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ プリフェッチ・インセンシティブのトランザクション・メモリ
US10152419B2 (en) 2015-11-10 2018-12-11 International Business Machines Corporation Deferred response to a prefetch request
US10474576B2 (en) 2015-11-10 2019-11-12 International Business Machines Corporation Prefetch protocol for transactional memory
US9904624B1 (en) 2016-04-07 2018-02-27 Apple Inc. Prefetch throttling in a multi-core system
US10180905B1 (en) 2016-04-07 2019-01-15 Apple Inc. Unified prefetch circuit for multi-level caches
US10169240B2 (en) * 2016-04-08 2019-01-01 Qualcomm Incorporated Reducing memory access bandwidth based on prediction of memory request size
US10649904B2 (en) 2016-12-12 2020-05-12 Samsung Electronics Co., Ltd. System and method for store streaming detection and handling
US10331567B1 (en) 2017-02-17 2019-06-25 Apple Inc. Prefetch circuit with global quality factor to reduce aggressiveness in low power modes
KR102429429B1 (ko) 2017-03-24 2022-08-04 삼성전자주식회사 전자 장치 및 그 동작방법
CN109669880A (zh) * 2017-10-13 2019-04-23 展讯通信（上海）有限公司 一种数据预取方法及装置、微处理器
US11270920B2 (en) 2018-08-14 2022-03-08 Medtronic, Inc. Integrated circuit package and method of forming same
US11086778B2 (en) * 2018-10-15 2021-08-10 Texas Instruments Incorporated Multicore shared cache operation engine
CN109408412B (zh) * 2018-10-24 2021-04-30 龙芯中科技术股份有限公司 内存预取控制方法、装置及设备
US10963249B2 (en) 2018-11-02 2021-03-30 International Business Machines Corporation Processor prefetcher mode governor for switching between prefetch modes
CN110427332B (zh) * 2019-08-05 2021-08-20 上海兆芯集成电路有限公司 数据预取装置、数据预取方法及微处理器
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CN114065947B (zh) * 2021-11-15 2022-07-22 深圳大学 一种数据访问推测方法、装置、存储介质及电子设备
CN120803976B (zh) * 2025-09-04 2025-11-28 浪潮电子信息产业股份有限公司 一种内存访问方法、设备、存储介质及程序产品

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Also Published As

Publication number Publication date
US20110066811A1 (en) 2011-03-17
EP2476060B1 (en) 2015-06-17
EP2476060A1 (en) 2012-07-18
CN102640124A (zh) 2012-08-15
US8667225B2 (en) 2014-03-04
JP2013504815A (ja) 2013-02-07
WO2011031837A1 (en) 2011-03-17
JP5615927B2 (ja) 2014-10-29
KR101614867B1 (ko) 2016-04-22
KR20120070584A (ko) 2012-06-29
CN102640124B (zh) 2015-11-25

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