KR101614867B1 - 데이터 스트림에 대한 저장 인식 프리페치 - Google Patents
데이터 스트림에 대한 저장 인식 프리페치 Download PDFInfo
- Publication number
- KR101614867B1 KR101614867B1 KR1020127009323A KR20127009323A KR101614867B1 KR 101614867 B1 KR101614867 B1 KR 101614867B1 KR 1020127009323 A KR1020127009323 A KR 1020127009323A KR 20127009323 A KR20127009323 A KR 20127009323A KR 101614867 B1 KR101614867 B1 KR 101614867B1
- Authority
- KR
- South Korea
- Prior art keywords
- data stream
- access
- cache
- prefetch
- predetermined threshold
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/0815—Cache consistency protocols
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/60—Details of cache memory
- G06F2212/6026—Prefetching based on access pattern detection, e.g. stride based prefetch
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/558,465 US8667225B2 (en) | 2009-09-11 | 2009-09-11 | Store aware prefetching for a datastream |
| US12/558,465 | 2009-09-11 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20120070584A KR20120070584A (ko) | 2012-06-29 |
| KR101614867B1 true KR101614867B1 (ko) | 2016-04-22 |
Family
ID=43242176
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020127009323A Active KR101614867B1 (ko) | 2009-09-11 | 2010-09-09 | 데이터 스트림에 대한 저장 인식 프리페치 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US8667225B2 (enExample) |
| EP (1) | EP2476060B1 (enExample) |
| JP (1) | JP5615927B2 (enExample) |
| KR (1) | KR101614867B1 (enExample) |
| CN (1) | CN102640124B (enExample) |
| IN (1) | IN2012DN02977A (enExample) |
| WO (1) | WO2011031837A1 (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10482020B2 (en) | 2017-03-24 | 2019-11-19 | Samsung Electronics Co., Ltd. | Electronic apparatus for outputting content using pipeline and method of operating the same |
Families Citing this family (43)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8307180B2 (en) | 2008-02-28 | 2012-11-06 | Nokia Corporation | Extended utilization area for a memory device |
| US8874824B2 (en) | 2009-06-04 | 2014-10-28 | Memory Technologies, LLC | Apparatus and method to share host system RAM with mass storage memory RAM |
| US8621478B2 (en) * | 2010-01-15 | 2013-12-31 | International Business Machines Corporation | Multiprocessor system with multiple concurrent modes of execution |
| US8832415B2 (en) * | 2010-01-08 | 2014-09-09 | International Business Machines Corporation | Mapping virtual addresses to different physical addresses for value disambiguation for thread memory access requests |
| US8533399B2 (en) * | 2010-01-15 | 2013-09-10 | International Business Machines Corporation | Cache directory look-up re-use as conflict check mechanism for speculative memory requests |
| US8509254B2 (en) * | 2010-06-28 | 2013-08-13 | Intel Corporation | Direct memory access engine physical memory descriptors for multi-media demultiplexing operations |
| US8583894B2 (en) * | 2010-09-09 | 2013-11-12 | Advanced Micro Devices | Hybrid prefetch method and apparatus |
| US8880847B2 (en) * | 2010-09-28 | 2014-11-04 | Texas Instruments Incorporated | Multistream prefetch buffer |
| US9417998B2 (en) | 2012-01-26 | 2016-08-16 | Memory Technologies Llc | Apparatus and method to provide cache move with non-volatile mass memory system |
| US9098418B2 (en) * | 2012-03-20 | 2015-08-04 | Apple Inc. | Coordinated prefetching based on training in hierarchically cached processors |
| US9311226B2 (en) | 2012-04-20 | 2016-04-12 | Memory Technologies Llc | Managing operational state data of a memory module using host memory in association with state change |
| US9311251B2 (en) | 2012-08-27 | 2016-04-12 | Apple Inc. | System cache with sticky allocation |
| GB2509765B (en) * | 2013-01-15 | 2015-07-15 | Imagination Tech Ltd | Improved control of pre-fetch traffic |
| US9384136B2 (en) * | 2013-04-12 | 2016-07-05 | International Business Machines Corporation | Modification of prefetch depth based on high latency event |
| WO2014202825A1 (en) * | 2013-06-20 | 2014-12-24 | Nokia Corporation | Microprocessor apparatus |
| JP6119523B2 (ja) * | 2013-09-20 | 2017-04-26 | 富士通株式会社 | 演算処理装置、演算処理装置の制御方法及びプログラム |
| US9766823B2 (en) | 2013-12-12 | 2017-09-19 | Memory Technologies Llc | Channel optimized storage modules |
| JP5936152B2 (ja) * | 2014-05-17 | 2016-06-15 | インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Machines Corporation | メモリアクセストレース方法 |
| US9529727B2 (en) | 2014-05-27 | 2016-12-27 | Qualcomm Incorporated | Reconfigurable fetch pipeline |
| WO2016097809A1 (en) * | 2014-12-14 | 2016-06-23 | Via Alliance Semiconductor Co., Ltd. | Multiple data prefetchers that defer to one another based on prefetch effectiveness by memory access type |
| KR101757098B1 (ko) | 2014-12-14 | 2017-07-26 | 비아 얼라이언스 세미컨덕터 씨오., 엘티디. | 메모리 액세스에 의한 효용성 기반 공격성 레벨 프리패칭 |
| US9971694B1 (en) * | 2015-06-24 | 2018-05-15 | Apple Inc. | Prefetch circuit for a processor with pointer optimization |
| US10324832B2 (en) * | 2016-05-25 | 2019-06-18 | Samsung Electronics Co., Ltd. | Address based multi-stream storage device access |
| US11169925B2 (en) * | 2015-08-25 | 2021-11-09 | Samsung Electronics Co., Ltd. | Capturing temporal store streams into CPU caches by dynamically varying store streaming thresholds |
| US10042749B2 (en) | 2015-11-10 | 2018-08-07 | International Business Machines Corporation | Prefetch insensitive transactional memory |
| JP6734760B2 (ja) | 2015-11-10 | 2020-08-05 | インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Machines Corporation | プリフェッチ・インセンシティブのトランザクション・メモリ |
| US10152419B2 (en) | 2015-11-10 | 2018-12-11 | International Business Machines Corporation | Deferred response to a prefetch request |
| US10474576B2 (en) | 2015-11-10 | 2019-11-12 | International Business Machines Corporation | Prefetch protocol for transactional memory |
| US9904624B1 (en) | 2016-04-07 | 2018-02-27 | Apple Inc. | Prefetch throttling in a multi-core system |
| US10180905B1 (en) | 2016-04-07 | 2019-01-15 | Apple Inc. | Unified prefetch circuit for multi-level caches |
| US10169240B2 (en) * | 2016-04-08 | 2019-01-01 | Qualcomm Incorporated | Reducing memory access bandwidth based on prediction of memory request size |
| US10649904B2 (en) | 2016-12-12 | 2020-05-12 | Samsung Electronics Co., Ltd. | System and method for store streaming detection and handling |
| US10331567B1 (en) | 2017-02-17 | 2019-06-25 | Apple Inc. | Prefetch circuit with global quality factor to reduce aggressiveness in low power modes |
| CN109669880A (zh) * | 2017-10-13 | 2019-04-23 | 展讯通信(上海)有限公司 | 一种数据预取方法及装置、微处理器 |
| US11270920B2 (en) | 2018-08-14 | 2022-03-08 | Medtronic, Inc. | Integrated circuit package and method of forming same |
| US11086778B2 (en) * | 2018-10-15 | 2021-08-10 | Texas Instruments Incorporated | Multicore shared cache operation engine |
| CN109408412B (zh) * | 2018-10-24 | 2021-04-30 | 龙芯中科技术股份有限公司 | 内存预取控制方法、装置及设备 |
| US10963249B2 (en) | 2018-11-02 | 2021-03-30 | International Business Machines Corporation | Processor prefetcher mode governor for switching between prefetch modes |
| CN110427332B (zh) * | 2019-08-05 | 2021-08-20 | 上海兆芯集成电路有限公司 | 数据预取装置、数据预取方法及微处理器 |
| GB2593487B (en) * | 2020-03-24 | 2022-05-04 | Advanced Risc Mach Ltd | Apparatus and method |
| US11726917B2 (en) * | 2020-06-26 | 2023-08-15 | Advanced Micro Devices, Inc. | Method and apparatus for a page-local delta-based prefetcher |
| CN114065947B (zh) * | 2021-11-15 | 2022-07-22 | 深圳大学 | 一种数据访问推测方法、装置、存储介质及电子设备 |
| CN120803976B (zh) * | 2025-09-04 | 2025-11-28 | 浪潮电子信息产业股份有限公司 | 一种内存访问方法、设备、存储介质及程序产品 |
Family Cites Families (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5778436A (en) | 1995-03-06 | 1998-07-07 | Duke University | Predictive caching system and method based on memory access which previously followed a cache miss |
| US5848254A (en) * | 1996-07-01 | 1998-12-08 | Sun Microsystems, Inc. | Multiprocessing system using an access to a second memory space to initiate software controlled data prefetch into a first address space |
| US6401193B1 (en) | 1998-10-26 | 2002-06-04 | Infineon Technologies North America Corp. | Dynamic data prefetching based on program counter and addressing mode |
| US6282614B1 (en) | 1999-04-15 | 2001-08-28 | National Semiconductor Corporation | Apparatus and method for reducing the power consumption of a microprocessor with multiple levels of caches |
| US6457101B1 (en) | 1999-12-20 | 2002-09-24 | Unisys Corporation | System and method for providing the speculative return of cached data within a hierarchical memory system |
| US6865652B1 (en) | 2000-06-02 | 2005-03-08 | Advanced Micro Devices, Inc. | FIFO with undo-push capability |
| US6571318B1 (en) | 2001-03-02 | 2003-05-27 | Advanced Micro Devices, Inc. | Stride based prefetcher with confidence counter and dynamic prefetch-ahead mechanism |
| JP4030314B2 (ja) * | 2002-01-29 | 2008-01-09 | 富士通株式会社 | 演算処理装置 |
| US7107408B2 (en) | 2002-03-22 | 2006-09-12 | Newisys, Inc. | Methods and apparatus for speculative probing with early completion and early request |
| US7103725B2 (en) | 2002-03-22 | 2006-09-05 | Newisys, Inc. | Methods and apparatus for speculative probing with early completion and delayed request |
| US7003633B2 (en) | 2002-11-04 | 2006-02-21 | Newisys, Inc. | Methods and apparatus for managing probe requests |
| US7099999B2 (en) * | 2003-09-30 | 2006-08-29 | International Business Machines Corporation | Apparatus and method for pre-fetching data to cached memory using persistent historical page table data |
| US7487296B1 (en) | 2004-02-19 | 2009-02-03 | Sun Microsystems, Inc. | Multi-stride prefetcher with a recurring prefetch table |
| JP4532931B2 (ja) * | 2004-02-25 | 2010-08-25 | 株式会社日立製作所 | プロセッサ、および、プリフェッチ制御方法 |
| US7836259B1 (en) | 2004-04-02 | 2010-11-16 | Advanced Micro Devices, Inc. | Prefetch unit for use with a cache memory subsystem of a cache memory hierarchy |
| US7434004B1 (en) | 2004-06-17 | 2008-10-07 | Sun Microsystems, Inc. | Prefetch prediction |
| US7380066B2 (en) | 2005-02-10 | 2008-05-27 | International Business Machines Corporation | Store stream prefetching in a microprocessor |
| US7350029B2 (en) * | 2005-02-10 | 2008-03-25 | International Business Machines Corporation | Data stream prefetching in a microprocessor |
| US7594078B2 (en) * | 2006-02-09 | 2009-09-22 | International Business Machines Corporation | D-cache miss prediction and scheduling |
| US7917731B2 (en) * | 2006-08-02 | 2011-03-29 | Qualcomm Incorporated | Method and apparatus for prefetching non-sequential instruction addresses |
| US20090106498A1 (en) | 2007-10-23 | 2009-04-23 | Kevin Michael Lepak | Coherent dram prefetcher |
| US7958317B2 (en) * | 2008-08-04 | 2011-06-07 | International Business Machines Corporation | Cache directed sequential prefetch |
-
2009
- 2009-09-11 US US12/558,465 patent/US8667225B2/en active Active
-
2010
- 2010-09-09 JP JP2012528890A patent/JP5615927B2/ja active Active
- 2010-09-09 EP EP10755043.6A patent/EP2476060B1/en active Active
- 2010-09-09 IN IN2977DEN2012 patent/IN2012DN02977A/en unknown
- 2010-09-09 KR KR1020127009323A patent/KR101614867B1/ko active Active
- 2010-09-09 CN CN201080051152.4A patent/CN102640124B/zh active Active
- 2010-09-09 WO PCT/US2010/048241 patent/WO2011031837A1/en not_active Ceased
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10482020B2 (en) | 2017-03-24 | 2019-11-19 | Samsung Electronics Co., Ltd. | Electronic apparatus for outputting content using pipeline and method of operating the same |
Also Published As
| Publication number | Publication date |
|---|---|
| IN2012DN02977A (enExample) | 2015-07-31 |
| US20110066811A1 (en) | 2011-03-17 |
| EP2476060B1 (en) | 2015-06-17 |
| EP2476060A1 (en) | 2012-07-18 |
| CN102640124A (zh) | 2012-08-15 |
| US8667225B2 (en) | 2014-03-04 |
| JP2013504815A (ja) | 2013-02-07 |
| WO2011031837A1 (en) | 2011-03-17 |
| JP5615927B2 (ja) | 2014-10-29 |
| KR20120070584A (ko) | 2012-06-29 |
| CN102640124B (zh) | 2015-11-25 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR101614867B1 (ko) | 데이터 스트림에 대한 저장 인식 프리페치 | |
| US9524164B2 (en) | Specialized memory disambiguation mechanisms for different memory read access types | |
| US7743232B2 (en) | Multiple-core processor with hierarchical microcode store | |
| US8583894B2 (en) | Hybrid prefetch method and apparatus | |
| US9015422B2 (en) | Access map-pattern match based prefetch unit for a processor | |
| US8230177B2 (en) | Store prefetching via store queue lookahead | |
| US9213640B2 (en) | Promoting transactions hitting critical beat of cache line load requests | |
| US9904624B1 (en) | Prefetch throttling in a multi-core system | |
| US20090006803A1 (en) | L2 Cache/Nest Address Translation | |
| US7680985B2 (en) | Method and apparatus for accessing a split cache directory | |
| US20130024647A1 (en) | Cache backed vector registers | |
| US20110276760A1 (en) | Non-committing store instructions | |
| US7937530B2 (en) | Method and apparatus for accessing a cache with an effective address | |
| JP7700219B2 (ja) | 局所性を欠くデータを対象とするメモリ要求のプリフェッチ無効化 | |
| EP4020229B1 (en) | System, apparatus and method for prefetching physical pages in a processor | |
| US8046538B1 (en) | Method and mechanism for cache compaction and bandwidth reduction | |
| US7251710B1 (en) | Cache memory subsystem including a fixed latency R/W pipeline |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PA0105 | International application |
Patent event date: 20120410 Patent event code: PA01051R01D Comment text: International Patent Application |
|
| PG1501 | Laying open of application | ||
| A201 | Request for examination | ||
| A302 | Request for accelerated examination | ||
| PA0201 | Request for examination |
Patent event code: PA02012R01D Patent event date: 20150908 Comment text: Request for Examination of Application |
|
| PA0302 | Request for accelerated examination |
Patent event date: 20150908 Patent event code: PA03022R01D Comment text: Request for Accelerated Examination |
|
| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
Comment text: Notification of reason for refusal Patent event date: 20151006 Patent event code: PE09021S01D |
|
| E701 | Decision to grant or registration of patent right | ||
| PE0701 | Decision of registration |
Patent event code: PE07011S01D Comment text: Decision to Grant Registration Patent event date: 20160120 |
|
| GRNT | Written decision to grant | ||
| PR0701 | Registration of establishment |
Comment text: Registration of Establishment Patent event date: 20160418 Patent event code: PR07011E01D |
|
| PR1002 | Payment of registration fee |
Payment date: 20160419 End annual number: 3 Start annual number: 1 |
|
| PG1601 | Publication of registration | ||
| PR1001 | Payment of annual fee |
Payment date: 20200317 Start annual number: 5 End annual number: 5 |
|
| PR1001 | Payment of annual fee |
Payment date: 20210324 Start annual number: 6 End annual number: 6 |
|
| PR1001 | Payment of annual fee |
Payment date: 20220411 Start annual number: 7 End annual number: 7 |
|
| PR1001 | Payment of annual fee |
Payment date: 20230418 Start annual number: 8 End annual number: 8 |
|
| PR1001 | Payment of annual fee |
Payment date: 20240417 Start annual number: 9 End annual number: 9 |
|
| PR1001 | Payment of annual fee |
Payment date: 20250407 Start annual number: 10 End annual number: 10 |