IN2012DN02726A - - Google Patents

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Publication number
IN2012DN02726A
IN2012DN02726A IN2726DEN2012A IN2012DN02726A IN 2012DN02726 A IN2012DN02726 A IN 2012DN02726A IN 2726DEN2012 A IN2726DEN2012 A IN 2726DEN2012A IN 2012DN02726 A IN2012DN02726 A IN 2012DN02726A
Authority
IN
India
Prior art keywords
tasks
shader core
processing unit
data associated
state data
Prior art date
Application number
Other languages
English (en)
Inventor
Michael Mantor
Rex Mccrary
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=43501178&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=IN2012DN02726(A) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of IN2012DN02726A publication Critical patent/IN2012DN02726A/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061—Partitioning or combining of resources
    • G06F9/5066—Algorithms for mapping a plurality of inter-dependent sub-tasks onto a plurality of physical CPUs
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/461—Saving or restoring of program or task context
    • G06F9/463—Program control block organisation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061—Partitioning or combining of resources
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T15/00—3D [Three Dimensional] image rendering
    • G06T15/005—General purpose rendering architectures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00—Indexing scheme relating to G06F9/00
    • G06F2209/50—Indexing scheme relating to G06F9/50
    • G06F2209/5017—Task decomposition

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Graphics (AREA)
  • Image Processing (AREA)
  • Image Generation (AREA)
IN2726DEN2012 2009-09-03 2010-09-03 IN2012DN02726A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US23971209P 2009-09-03 2009-09-03
US12/874,134 US8854381B2 (en) 2009-09-03 2010-09-01 Processing unit that enables asynchronous task dispatch
PCT/US2010/047786 WO2011028986A2 (en) 2009-09-03 2010-09-03 A processing unit that enables asyncronous task dispatch

Publications (1)

Publication Number Publication Date
IN2012DN02726A true IN2012DN02726A (zh) 2015-09-11

Family

ID=43501178

Family Applications (1)

Application Number Title Priority Date Filing Date
IN2726DEN2012 IN2012DN02726A (zh) 2009-09-03 2010-09-03

Country Status (7)

Country Link
US (1) US8854381B2 (zh)
EP (1) EP2473920B8 (zh)
JP (1) JP5791608B2 (zh)
KR (1) KR101642105B1 (zh)
CN (1) CN102640115B (zh)
IN (1) IN2012DN02726A (zh)
WO (1) WO2011028986A2 (zh)

Families Citing this family (37)

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US9430281B2 (en) 2010-12-16 2016-08-30 Advanced Micro Devices, Inc. Heterogeneous enqueuing and dequeuing mechanism for task scheduling
US9378560B2 (en) * 2011-06-17 2016-06-28 Advanced Micro Devices, Inc. Real time on-chip texture decompression using shader processors
US9195501B2 (en) * 2011-07-12 2015-11-24 Qualcomm Incorporated Instruction culling in graphics processing unit
US9727385B2 (en) 2011-07-18 2017-08-08 Apple Inc. Graphical processing unit (GPU) implementing a plurality of virtual GPUs
WO2013090605A2 (en) * 2011-12-14 2013-06-20 Advanced Micro Devices, Inc. Saving and restoring shader context state and resuming a faulted apd wavefront
US20130155077A1 (en) * 2011-12-14 2013-06-20 Advanced Micro Devices, Inc. Policies for Shader Resource Allocation in a Shader Core
US8842122B2 (en) * 2011-12-15 2014-09-23 Qualcomm Incorporated Graphics processing unit with command processor
US9430807B2 (en) * 2012-02-27 2016-08-30 Qualcomm Incorporated Execution model for heterogeneous computing
US9996394B2 (en) 2012-03-01 2018-06-12 Microsoft Technology Licensing, Llc Scheduling accelerator tasks on accelerators using graphs
US10559123B2 (en) * 2012-04-04 2020-02-11 Qualcomm Incorporated Patched shading in graphics processing
WO2013159272A1 (en) * 2012-04-23 2013-10-31 Hewlett-Packard Development Company Statistical analysis using graphics processing unit
US20130311548A1 (en) * 2012-05-15 2013-11-21 Nvidia Corporation Virtualized graphics processing for remote display
CN103064657B (zh) * 2012-12-26 2016-09-28 深圳中微电科技有限公司 单个处理器上实现多应用并行处理的方法及装置
US20140267327A1 (en) 2013-03-14 2014-09-18 Microsoft Corporation Graphics Processing using Multiple Primitives
US9424079B2 (en) 2013-06-27 2016-08-23 Microsoft Technology Licensing, Llc Iteration support in a heterogeneous dataflow engine
WO2015047302A1 (en) * 2013-09-27 2015-04-02 Hewlett-Packard Development Company, L.P. Processing a hybrid flow associated with a service class
US10198788B2 (en) * 2013-11-11 2019-02-05 Oxide Interactive Llc Method and system of temporally asynchronous shading decoupled from rasterization
WO2015074239A1 (en) * 2013-11-22 2015-05-28 Intel Corporation Method and apparatus to improve performance of chained tasks on a graphics processing unit
EP3092560B1 (en) * 2014-01-06 2019-05-08 Johnson Controls Technology Company Vehicle with multiple user interface operating domains
US20160328254A1 (en) * 2014-01-06 2016-11-10 Johnson Controls Technology Company Vehicle with multiple user interface operating domains
US9530174B2 (en) 2014-05-30 2016-12-27 Apple Inc. Selective GPU throttling
WO2015194133A1 (ja) * 2014-06-19 2015-12-23 日本電気株式会社 演算装置、演算装置の制御方法、及び、演算装置の制御プログラムが記録された記憶媒体
KR101900172B1 (ko) * 2014-06-26 2018-09-18 인텔 코포레이션 가상화 환경에서의 지능형 ｇｐｕ 스케줄링
KR102263326B1 (ko) 2014-09-18 2021-06-09 삼성전자주식회사 그래픽 프로세싱 유닛 및 이를 이용한 그래픽 데이터 처리 방법
US10423414B2 (en) * 2014-11-12 2019-09-24 Texas Instruments Incorporated Parallel processing in hardware accelerators communicably coupled with a processor
US10210655B2 (en) * 2015-09-25 2019-02-19 Intel Corporation Position only shader context submission through a render command streamer
CN106598705B (zh) * 2015-10-15 2020-08-11 菜鸟智能物流控股有限公司 一种异步任务的调度方法、装置、系统以及电子设备
US9830678B2 (en) * 2016-03-03 2017-11-28 International Business Machines Corporation Graphics processing unit resource sharing
KR102577184B1 (ko) * 2016-05-24 2023-09-11 삼성전자주식회사 전자 장치 및 그의 동작 방법
US20180033114A1 (en) * 2016-07-26 2018-02-01 Mediatek Inc. Graphics Pipeline That Supports Multiple Concurrent Processes
CN106648551A (zh) * 2016-12-12 2017-05-10 中国航空工业集团公司西安航空计算技术研究所 一种混合图形处理器指令处理系统
US11609791B2 (en) * 2017-11-30 2023-03-21 Advanced Micro Devices, Inc. Precise suspend and resume of workloads in a processing unit
US10540824B1 (en) * 2018-07-09 2020-01-21 Microsoft Technology Licensing, Llc 3-D transitions
US11436783B2 (en) 2019-10-16 2022-09-06 Oxide Interactive, Inc. Method and system of decoupled object space shading
US11403729B2 (en) * 2020-02-28 2022-08-02 Advanced Micro Devices, Inc. Dynamic transparent reconfiguration of a multi-tenant graphics processing unit
US11340942B2 (en) * 2020-03-19 2022-05-24 Raytheon Company Cooperative work-stealing scheduler
US11941723B2 (en) * 2021-12-29 2024-03-26 Advanced Micro Devices, Inc. Dynamic dispatch for workgroup distribution

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CA2050658C (en) 1990-09-14 1997-01-28 John M. Peaslee Dual hardware channels and hardware context switching in a graphics rendering processor
US6252600B1 (en) 1998-10-02 2001-06-26 International Business Machines Corporation Computer graphics system with dual FIFO interface
US6943800B2 (en) * 2001-08-13 2005-09-13 Ati Technologies, Inc. Method and apparatus for updating state data
US7659898B2 (en) * 2005-08-08 2010-02-09 Via Technologies, Inc. Multi-execution resource graphics processor
US8884972B2 (en) * 2006-05-25 2014-11-11 Qualcomm Incorporated Graphics processor with arithmetic and elementary function units
US8345053B2 (en) * 2006-09-21 2013-01-01 Qualcomm Incorporated Graphics processors with parallel scheduling and execution of threads
US7830387B2 (en) 2006-11-07 2010-11-09 Microsoft Corporation Parallel engine support in display driver model
US8284205B2 (en) * 2007-10-24 2012-10-09 Apple Inc. Methods and apparatuses for load balancing between multiple processing units
US20090160867A1 (en) 2007-12-19 2009-06-25 Advance Micro Devices, Inc. Autonomous Context Scheduler For Graphics Processing Units
US8629878B2 (en) * 2009-08-26 2014-01-14 Red Hat, Inc. Extension to a hypervisor that utilizes graphics hardware on a host

Also Published As

Publication number Publication date
EP2473920A2 (en) 2012-07-11
JP5791608B2 (ja) 2015-10-07
WO2011028986A3 (en) 2011-11-24
KR101642105B1 (ko) 2016-07-22
KR20120064097A (ko) 2012-06-18
CN102640115B (zh) 2015-03-25
US20110115802A1 (en) 2011-05-19
EP2473920B8 (en) 2018-05-16
WO2011028986A2 (en) 2011-03-10
EP2473920B1 (en) 2018-03-14
CN102640115A (zh) 2012-08-15
JP2013504131A (ja) 2013-02-04
US8854381B2 (en) 2014-10-07

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