IN2012DE00977A - - Google Patents

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Publication number
IN2012DE00977A
IN2012DE00977A IN977DE2012A IN2012DE00977A IN 2012DE00977 A IN2012DE00977 A IN 2012DE00977A IN 977DE2012 A IN977DE2012 A IN 977DE2012A IN 2012DE00977 A IN2012DE00977 A IN 2012DE00977A
Authority
IN
India
Application number
Other languages
English (en)
Inventor
Balakesan Pooniah Thevar
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Priority to IN977DE2012 priority Critical patent/IN2012DE00977A/en
Priority to US13/729,682 priority patent/US9454201B2/en
Priority to CN201310096353.1A priority patent/CN103365799B/zh
Publication of IN2012DE00977A publication Critical patent/IN2012DE00977A/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/30Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206Monitoring of events, devices or parameters that trigger a change in power modality
    • G06F1/3215Monitoring of peripheral devices
    • G06F1/3225Monitoring of peripheral devices of memory devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/325Power saving in peripheral device
    • G06F1/3275Power saving in memory, e.g. RAM, cache
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00Reducing energy consumption in communication networks
    • Y02D30/50Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Power Sources (AREA)
IN977DE2012 2012-03-30 2012-03-30 IN2012DE00977A (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
IN977DE2012 IN2012DE00977A (fr) 2012-03-30 2012-03-30
US13/729,682 US9454201B2 (en) 2012-03-30 2012-12-28 Detecting access to powered down device
CN201310096353.1A CN103365799B (zh) 2012-03-30 2013-03-25 用于检测对掉电设备的访问的装置、方法、系统和设备

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IN977DE2012 IN2012DE00977A (fr) 2012-03-30 2012-03-30

Publications (1)

Publication Number Publication Date
IN2012DE00977A true IN2012DE00977A (fr) 2015-09-11

Family

ID=49236719

Family Applications (1)

Application Number Title Priority Date Filing Date
IN977DE2012 IN2012DE00977A (fr) 2012-03-30 2012-03-30

Country Status (3)

Country Link
US (1) US9454201B2 (fr)
CN (1) CN103365799B (fr)
IN (1) IN2012DE00977A (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9489300B2 (en) 2013-06-19 2016-11-08 Sandisk Technologies Llc Data encoding for non-volatile memory
US9489299B2 (en) * 2013-06-19 2016-11-08 Sandisk Technologies Llc Data encoding for non-volatile memory
US9489294B2 (en) 2013-06-19 2016-11-08 Sandisk Technologies Llc Data encoding for non-volatile memory
US9390008B2 (en) 2013-12-11 2016-07-12 Sandisk Technologies Llc Data encoding for non-volatile memory
US9396070B2 (en) * 2014-09-11 2016-07-19 Qualcomm Incorporated System and method for system-on-a-chip subsystem external access detection and recovery

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5901103A (en) * 1997-04-07 1999-05-04 Motorola, Inc. Integrated circuit having standby control for memory and method thereof
US6230274B1 (en) 1998-11-03 2001-05-08 Intel Corporation Method and apparatus for restoring a memory device channel when exiting a low power state
US6243315B1 (en) * 1999-12-31 2001-06-05 James B. Goodman Computer memory system with a low power down mode
US7165165B2 (en) * 2004-03-16 2007-01-16 Intel Corporation Anticipatory power control of memory
US7343502B2 (en) 2004-07-26 2008-03-11 Intel Corporation Method and apparatus for dynamic DLL powerdown and memory self-refresh
DE102004047764B4 (de) * 2004-09-30 2006-08-10 Infineon Technologies Ag Speicheranordnung, Verfahren zum Betrieb und Verwendung einer solchen
GB2426360A (en) * 2005-05-18 2006-11-22 Symbian Software Ltd Reorganisation of memory for conserving power in a computing device
DE102005037635B4 (de) * 2005-08-09 2007-07-12 Infineon Technologies Ag Hardwaresteuerung für den Wechsel des Betriebsmodus eines Speichers
JP4209906B2 (ja) * 2006-08-02 2009-01-14 株式会社日立製作所 低消費電力メモリ管理方法及びその方法を用いた計算機
CN101187830B (zh) 2007-12-27 2012-05-23 成都市华为赛门铁克科技有限公司 掉电保护方法、装置、逻辑器件及存储系统
US8301928B2 (en) * 2008-01-18 2012-10-30 Texas Instruments Incorporated Automatic wakeup handling on access in shared memory controller
JP5214262B2 (ja) * 2008-01-30 2013-06-19 株式会社東芝 半導体集積回路及び電源制御方法
JP5414350B2 (ja) * 2009-05-08 2014-02-12 キヤノン株式会社 メモリ制御回路、及び、その制御方法
US8688955B2 (en) * 2010-08-13 2014-04-01 Micron Technology, Inc. Line termination methods and apparatus
JP5624583B2 (ja) * 2012-05-31 2014-11-12 株式会社東芝 プログラム、計算処理装置、メモリ管理方法および計算機

Also Published As

Publication number Publication date
US9454201B2 (en) 2016-09-27
US20130262903A1 (en) 2013-10-03
CN103365799A (zh) 2013-10-23
CN103365799B (zh) 2017-03-01

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