IN170451B - - Google Patents
Info
- Publication number
- IN170451B IN170451B IN122/DEL/87A IN122DE1987A IN170451B IN 170451 B IN170451 B IN 170451B IN 122DE1987 A IN122DE1987 A IN 122DE1987A IN 170451 B IN170451 B IN 170451B
- Authority
- IN
- India
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0607—Interleaved addressing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Static Random-Access Memory (AREA)
- Dram (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US06/823,951 US4791552A (en) | 1986-01-29 | 1986-01-29 | Apparatus and method for addressing semiconductor arrays in a main memory unit on consecutive system clock cycles |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| IN170451B true IN170451B (es) | 1992-03-28 |
Family
ID=25240223
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IN122/DEL/87A IN170451B (es) | 1986-01-29 | 1987-02-13 |
Country Status (10)
| Country | Link |
|---|---|
| US (1) | US4791552A (es) |
| KR (1) | KR910004398B1 (es) |
| CN (1) | CN1007843B (es) |
| AU (1) | AU6932387A (es) |
| CA (1) | CA1275329C (es) |
| ES (1) | ES2002952A6 (es) |
| IL (1) | IL81426A (es) |
| IN (1) | IN170451B (es) |
| MX (1) | MX161925A (es) |
| WO (1) | WO1987004822A1 (es) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3215105B2 (ja) * | 1990-08-24 | 2001-10-02 | 富士通株式会社 | メモリアクセス装置 |
| JP2740063B2 (ja) * | 1990-10-15 | 1998-04-15 | 株式会社東芝 | 半導体記憶装置 |
| US6941428B2 (en) | 2002-09-25 | 2005-09-06 | International Business Machines Corporation | Memory controller optimization |
| US8200887B2 (en) * | 2007-03-29 | 2012-06-12 | Violin Memory, Inc. | Memory management system and method |
| US9093445B2 (en) * | 2011-08-26 | 2015-07-28 | International Business Machines Corporation | Packaging identical chips in a stacked structure |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3753014A (en) * | 1971-03-15 | 1973-08-14 | Burroughs Corp | Fast inhibit gate with applications |
| US3931613A (en) * | 1974-09-25 | 1976-01-06 | Data General Corporation | Data processing system |
| GB1536853A (en) * | 1975-05-01 | 1978-12-20 | Plessey Co Ltd | Data processing read and hold facility |
| US4378589A (en) * | 1976-12-27 | 1983-03-29 | International Business Machines Corporation | Undirectional looped bus microcomputer architecture |
| US4435757A (en) * | 1979-07-25 | 1984-03-06 | The Singer Company | Clock control for digital computer |
| US4287563A (en) * | 1979-11-13 | 1981-09-01 | Motorola, Inc. | Versatile microprocessor bus interface |
| US4393461A (en) * | 1980-10-06 | 1983-07-12 | Honeywell Information Systems Inc. | Communications subsystem having a self-latching data monitor and storage device |
| US4631659A (en) * | 1984-03-08 | 1986-12-23 | Texas Instruments Incorporated | Memory interface with automatic delay state |
| JPS618785A (ja) * | 1984-06-21 | 1986-01-16 | Fujitsu Ltd | 記憶装置アクセス制御方式 |
-
1986
- 1986-01-29 US US06/823,951 patent/US4791552A/en not_active Expired - Lifetime
-
1987
- 1987-01-28 CA CA000528351A patent/CA1275329C/en not_active Expired - Fee Related
- 1987-01-28 ES ES8700204A patent/ES2002952A6/es not_active Expired
- 1987-01-29 AU AU69323/87A patent/AU6932387A/en not_active Abandoned
- 1987-01-29 MX MX5087A patent/MX161925A/es unknown
- 1987-01-29 WO PCT/US1987/000184 patent/WO1987004822A1/en unknown
- 1987-01-29 KR KR1019870700878A patent/KR910004398B1/ko not_active IP Right Cessation
- 1987-01-29 IL IL81426A patent/IL81426A/xx not_active IP Right Cessation
- 1987-02-02 CN CN87101605A patent/CN1007843B/zh not_active Expired
- 1987-02-13 IN IN122/DEL/87A patent/IN170451B/en unknown
Also Published As
| Publication number | Publication date |
|---|---|
| US4791552A (en) | 1988-12-13 |
| AU6932387A (en) | 1987-08-25 |
| WO1987004822A1 (en) | 1987-08-13 |
| CN1007843B (zh) | 1990-05-02 |
| CA1275329C (en) | 1990-10-16 |
| ES2002952A6 (es) | 1988-10-01 |
| KR910004398B1 (ko) | 1991-06-27 |
| CN87101605A (zh) | 1987-12-30 |
| KR880700971A (ko) | 1988-04-13 |
| IL81426A (en) | 1990-11-29 |
| IL81426A0 (en) | 1987-08-31 |
| MX161925A (es) | 1991-03-06 |