IN167131B - - Google Patents

Info

Publication number
IN167131B
IN167131B IN185/BOM/87A IN185BO1987A IN167131B IN 167131 B IN167131 B IN 167131B IN 185BO1987 A IN185BO1987 A IN 185BO1987A IN 167131 B IN167131 B IN 167131B
Authority
IN
India
Application number
IN185/BOM/87A
Other languages
English (en)
Inventor
Victor Miguel Morganti
James Blaine Geyer
Original Assignee
Honeywell Bull
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Bull filed Critical Honeywell Bull
Publication of IN167131B publication Critical patent/IN167131B/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12Replacement control
    • G06F12/121Replacement control using replacement algorithms
    • G06F12/123Replacement control using replacement algorithms with age lists, e.g. queue, most recently used [MRU] list or least recently used [LRU] list
    • G06F12/125Replacement control using replacement algorithms with age lists, e.g. queue, most recently used [MRU] list or least recently used [LRU] list being generated by decoding an array or storage
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
IN185/BOM/87A 1986-05-30 1987-06-12 IN167131B (da)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/869,146 US4833603A (en) 1986-05-30 1986-05-30 Apparatus and method for implementation of a page frame replacement algorithm in a data processing system having virtual memory addressing

Publications (1)

Publication Number Publication Date
IN167131B true IN167131B (da) 1990-09-01

Family

ID=25353012

Family Applications (1)

Application Number Title Priority Date Filing Date
IN185/BOM/87A IN167131B (da) 1986-05-30 1987-06-12

Country Status (19)

Country Link
US (1) US4833603A (da)
EP (1) EP0250876B1 (da)
KR (1) KR930009092B1 (da)
CN (1) CN1010715B (da)
AR (1) AR244897A1 (da)
AT (1) ATE100613T1 (da)
AU (1) AU597666B2 (da)
BR (1) BR8702715A (da)
CA (1) CA1284390C (da)
DE (1) DE3788824T2 (da)
DK (1) DK276887A (da)
ES (1) ES2049721T3 (da)
FI (1) FI90805C (da)
IL (1) IL82681A0 (da)
IN (1) IN167131B (da)
MX (1) MX171149B (da)
NO (1) NO174311C (da)
PH (1) PH25271A (da)
YU (1) YU99187A (da)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2778786B2 (ja) * 1990-03-02 1998-07-23 富士通株式会社 データ更新・復元処理方式
US5386538A (en) * 1991-04-30 1995-01-31 Texas Instruments Incorporated Data cache access for signal processing systems
US5740448A (en) * 1995-07-07 1998-04-14 Sun Microsystems, Inc. Method and apparatus for exclusive access to shared data structures through index referenced buffers
US6763424B2 (en) 2001-01-19 2004-07-13 Sandisk Corporation Partial block data programming and reading operations in a non-volatile memory
US6782464B2 (en) 2001-07-17 2004-08-24 International Business Machines Corporation Mapping a logical address to a plurality on non-logical addresses
US7242682B1 (en) 2002-10-09 2007-07-10 Storage Technology Corporation Hardware frame modifier apparatus and method for storage virtualization

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1548401A (en) * 1975-10-08 1979-07-11 Plessey Co Ltd Data processing memory space allocation and deallocation arrangements
US4084230A (en) * 1976-11-29 1978-04-11 International Business Machines Corporation Hybrid semiconductor memory with on-chip associative page addressing, page replacement and control
WO1984002784A1 (en) * 1982-12-30 1984-07-19 Ibm Virtual memory address translation mechanism with controlled data persistence

Also Published As

Publication number Publication date
FI872396A0 (fi) 1987-05-29
FI872396A (fi) 1987-12-01
DE3788824D1 (de) 1994-03-03
CN87104487A (zh) 1988-02-17
DK276887A (da) 1987-12-01
BR8702715A (pt) 1988-03-01
NO174311C (no) 1994-04-13
PH25271A (en) 1991-03-27
NO872263L (no) 1987-12-01
IL82681A0 (en) 1987-11-30
CN1010715B (zh) 1990-12-05
ATE100613T1 (de) 1994-02-15
CA1284390C (en) 1991-05-21
NO174311B (no) 1994-01-03
DE3788824T2 (de) 1994-07-14
NO872263D0 (no) 1987-05-29
EP0250876A3 (en) 1990-04-25
YU99187A (en) 1990-06-30
FI90805C (fi) 1994-03-25
US4833603A (en) 1989-05-23
DK276887D0 (da) 1987-05-29
FI90805B (fi) 1993-12-15
KR870011534A (ko) 1987-12-24
MX171149B (es) 1993-10-05
ES2049721T3 (es) 1994-05-01
EP0250876A2 (en) 1988-01-07
KR930009092B1 (ko) 1993-09-22
EP0250876B1 (en) 1994-01-19
AU597666B2 (en) 1990-06-07
AR244897A1 (es) 1993-11-30
AU7369387A (en) 1987-12-03

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