IL76759A - Process for fabricating dimensionally stable interconnect electronic circuit boards - Google Patents

Process for fabricating dimensionally stable interconnect electronic circuit boards

Info

Publication number
IL76759A
IL76759A IL76759A IL7675985A IL76759A IL 76759 A IL76759 A IL 76759A IL 76759 A IL76759 A IL 76759A IL 7675985 A IL7675985 A IL 7675985A IL 76759 A IL76759 A IL 76759A
Authority
IL
Israel
Prior art keywords
fabricating
electronic circuit
circuit boards
dimensionally stable
interconnect electronic
Prior art date
Application number
IL76759A
Other languages
English (en)
Original Assignee
Hughes Aircraft Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hughes Aircraft Co filed Critical Hughes Aircraft Co
Publication of IL76759A publication Critical patent/IL76759A/xx

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/142—Metallic substrates having insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4867—Applying pastes or inks, e.g. screen printing
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4664—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49163—Manufacturing circuit on or in base with sintering of base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
IL76759A 1984-11-19 1985-10-20 Process for fabricating dimensionally stable interconnect electronic circuit boards IL76759A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/672,562 US4645552A (en) 1984-11-19 1984-11-19 Process for fabricating dimensionally stable interconnect boards

Publications (1)

Publication Number Publication Date
IL76759A true IL76759A (en) 1990-09-17

Family

ID=24699082

Family Applications (1)

Application Number Title Priority Date Filing Date
IL76759A IL76759A (en) 1984-11-19 1985-10-20 Process for fabricating dimensionally stable interconnect electronic circuit boards

Country Status (6)

Country Link
US (1) US4645552A (xx)
EP (1) EP0201583B1 (xx)
JP (1) JPS62501181A (xx)
DE (1) DE3570013D1 (xx)
IL (1) IL76759A (xx)
WO (1) WO1986003337A1 (xx)

Families Citing this family (62)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2567684B1 (fr) * 1984-07-10 1988-11-04 Nec Corp Module ayant un substrat ceramique multicouche et un circuit multicouche sur ce substrat et procede pour sa fabrication
US4802945A (en) * 1986-10-09 1989-02-07 Hughes Aircraft Company Via filling of green ceramic tape
WO1988002928A1 (en) * 1986-10-09 1988-04-21 Hughes Aircraft Company Via filling of green ceramic tape
US4799984A (en) * 1987-09-18 1989-01-24 E. I. Du Pont De Nemours And Company Method for fabricating multilayer circuits
US4806188A (en) * 1988-03-04 1989-02-21 E. I. Du Pont De Nemours And Company Method for fabricating multilayer circuits
US5502889A (en) * 1988-06-10 1996-04-02 Sheldahl, Inc. Method for electrically and mechanically connecting at least two conductive layers
US4961998A (en) * 1988-09-23 1990-10-09 National Starch And Chemical Investment Holding Corporation Dielectric composition having controlled thermal expansion
US5041695A (en) * 1989-06-01 1991-08-20 Westinghouse Electric Corp. Co-fired ceramic package for a power circuit
US4994302A (en) * 1989-06-27 1991-02-19 Digital Equipment Corporation Method of manufacturing thick-film devices
US5102720A (en) * 1989-09-22 1992-04-07 Cornell Research Foundation, Inc. Co-fired multilayer ceramic tapes that exhibit constrained sintering
US5028473A (en) * 1989-10-02 1991-07-02 Hughes Aircraft Company Three dimensional microcircuit structure and process for fabricating the same from ceramic tape
US5176772A (en) * 1989-10-05 1993-01-05 Asahi Glass Company Ltd. Process for fabricating a multilayer ceramic circuit board
US4991283A (en) * 1989-11-27 1991-02-12 Johnson Gary W Sensor elements in multilayer ceramic tape structures
US5292548A (en) * 1990-04-03 1994-03-08 Vistatech Corporation Substrates used in multilayered integrated circuits and multichips
DE4025715C1 (xx) * 1990-08-14 1992-04-02 Robert Bosch Gmbh, 7000 Stuttgart, De
DE4030055A1 (de) * 1990-09-22 1992-03-26 Bosch Gmbh Robert Verfahren zum herstellen einer schaltung
US5158912A (en) * 1991-04-09 1992-10-27 Digital Equipment Corporation Integral heatsink semiconductor package
US5256469A (en) * 1991-12-18 1993-10-26 General Electric Company Multi-layered, co-fired, ceramic-on-metal circuit board for microelectronic packaging
US5727310A (en) * 1993-01-08 1998-03-17 Sheldahl, Inc. Method of manufacturing a multilayer electronic circuit
US5527998A (en) * 1993-10-22 1996-06-18 Sheldahl, Inc. Flexible multilayer printed circuit boards and methods of manufacture
JP2783751B2 (ja) * 1993-12-21 1998-08-06 富士通株式会社 多層セラミック基板の製造方法
US5657532A (en) * 1996-01-16 1997-08-19 Ferro Corporation Method of making insulated electrical heating element using LTCC tape
US6930256B1 (en) 2002-05-01 2005-08-16 Amkor Technology, Inc. Integrated circuit substrate having laser-embedded conductive patterns and method therefor
US6583019B2 (en) * 2001-11-19 2003-06-24 Gennum Corporation Perimeter anchored thick film pad
US7633765B1 (en) 2004-03-23 2009-12-15 Amkor Technology, Inc. Semiconductor package including a top-surface metal layer for implementing circuit features
US9691635B1 (en) 2002-05-01 2017-06-27 Amkor Technology, Inc. Buildup dielectric layer having metallization pattern semiconductor package fabrication method
US7548430B1 (en) 2002-05-01 2009-06-16 Amkor Technology, Inc. Buildup dielectric and metallization process and semiconductor package
TW540285B (en) * 2002-09-11 2003-07-01 Universal Scient Ind Co Ltd Parallel stack process of multi-layer circuit board
US20040080917A1 (en) * 2002-10-23 2004-04-29 Steddom Clark Morrison Integrated microwave package and the process for making the same
US11081370B2 (en) 2004-03-23 2021-08-03 Amkor Technology Singapore Holding Pte. Ltd. Methods of manufacturing an encapsulated semiconductor device
US10811277B2 (en) 2004-03-23 2020-10-20 Amkor Technology, Inc. Encapsulated semiconductor package
US7550857B1 (en) 2006-11-16 2009-06-23 Amkor Technology, Inc. Stacked redistribution layer (RDL) die assembly package
DE102009012139B4 (de) * 2009-03-06 2012-02-23 Epcos Ag Modulsubstrat und Verfahren zur Herstellung
US7960827B1 (en) 2009-04-09 2011-06-14 Amkor Technology, Inc. Thermal via heat spreader package and method
US8623753B1 (en) 2009-05-28 2014-01-07 Amkor Technology, Inc. Stackable protruding via package and method
US8222538B1 (en) 2009-06-12 2012-07-17 Amkor Technology, Inc. Stackable via package and method
US8471154B1 (en) 2009-08-06 2013-06-25 Amkor Technology, Inc. Stackable variable height via package and method
US8796561B1 (en) 2009-10-05 2014-08-05 Amkor Technology, Inc. Fan out build up substrate stackable package and method
US8937381B1 (en) 2009-12-03 2015-01-20 Amkor Technology, Inc. Thin stackable package and method
US9691734B1 (en) 2009-12-07 2017-06-27 Amkor Technology, Inc. Method of forming a plurality of electronic component packages
US8536462B1 (en) 2010-01-22 2013-09-17 Amkor Technology, Inc. Flex circuit package and method
US8300423B1 (en) 2010-05-25 2012-10-30 Amkor Technology, Inc. Stackable treated via package and method
US8294276B1 (en) 2010-05-27 2012-10-23 Amkor Technology, Inc. Semiconductor device and fabricating method thereof
US8338229B1 (en) 2010-07-30 2012-12-25 Amkor Technology, Inc. Stackable plasma cleaned via package and method
US8717775B1 (en) 2010-08-02 2014-05-06 Amkor Technology, Inc. Fingerprint sensor package and method
US8337657B1 (en) 2010-10-27 2012-12-25 Amkor Technology, Inc. Mechanical tape separation package and method
US8482134B1 (en) 2010-11-01 2013-07-09 Amkor Technology, Inc. Stackable package and method
US9748154B1 (en) 2010-11-04 2017-08-29 Amkor Technology, Inc. Wafer level fan out semiconductor device and manufacturing method thereof
US8525318B1 (en) 2010-11-10 2013-09-03 Amkor Technology, Inc. Semiconductor device and fabricating method thereof
US8557629B1 (en) 2010-12-03 2013-10-15 Amkor Technology, Inc. Semiconductor device having overlapped via apertures
US8535961B1 (en) 2010-12-09 2013-09-17 Amkor Technology, Inc. Light emitting diode (LED) package and method
US9721872B1 (en) 2011-02-18 2017-08-01 Amkor Technology, Inc. Methods and structures for increasing the allowable die size in TMV packages
US9013011B1 (en) 2011-03-11 2015-04-21 Amkor Technology, Inc. Stacked and staggered die MEMS package and method
KR101140113B1 (ko) 2011-04-26 2012-04-30 앰코 테크놀로지 코리아 주식회사 반도체 디바이스
US8653674B1 (en) 2011-09-15 2014-02-18 Amkor Technology, Inc. Electronic component package fabrication method and structure
US8633598B1 (en) 2011-09-20 2014-01-21 Amkor Technology, Inc. Underfill contacting stacking balls package fabrication method and structure
US9029962B1 (en) 2011-10-12 2015-05-12 Amkor Technology, Inc. Molded cavity substrate MEMS package fabrication method and structure
US9799592B2 (en) 2013-11-19 2017-10-24 Amkor Technology, Inc. Semicondutor device with through-silicon via-less deep wells
KR101366461B1 (ko) 2012-11-20 2014-02-26 앰코 테크놀로지 코리아 주식회사 반도체 디바이스 및 그 제조 방법
KR101488590B1 (ko) 2013-03-29 2015-01-30 앰코 테크놀로지 코리아 주식회사 반도체 디바이스 및 그 제조 방법
KR101607981B1 (ko) 2013-11-04 2016-03-31 앰코 테크놀로지 코리아 주식회사 반도체 패키지용 인터포저 및 이의 제조 방법, 제조된 인터포저를 이용한 반도체 패키지
US9960328B2 (en) 2016-09-06 2018-05-01 Amkor Technology, Inc. Semiconductor device and manufacturing method thereof

Family Cites Families (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE562405A (xx) * 1956-11-15
US3506473A (en) * 1964-06-25 1970-04-14 Vitta Corp Method of transferring glass frit image from transfer sheet
US3436819A (en) * 1965-09-22 1969-04-08 Litton Systems Inc Multilayer laminate
US3371001A (en) * 1965-09-27 1968-02-27 Vitta Corp Method of applying uniform thickness of frit on semi-conductor wafers
US3838204A (en) * 1966-03-30 1974-09-24 Ibm Multilayer circuits
US3423517A (en) * 1966-07-27 1969-01-21 Dielectric Systems Inc Monolithic ceramic electrical interconnecting structure
US3756891A (en) * 1967-12-26 1973-09-04 Multilayer circuit board techniques
US3549784A (en) * 1968-02-01 1970-12-22 American Lava Corp Ceramic-metallic composite substrate
US3576668A (en) * 1968-06-07 1971-04-27 United Aircraft Corp Multilayer thick film ceramic hybrid integrated circuit
US3852877A (en) * 1969-08-06 1974-12-10 Ibm Multilayer circuits
US3655496A (en) * 1969-09-25 1972-04-11 Vitta Corp Tape transfer of sinterable conductive, semiconductive or insulating patterns to electronic component substrates
US3728185A (en) * 1970-05-22 1973-04-17 Owens Illinois Inc Olefin-so2 compositions containing finely divided fusible inorganic material and method for bonding therewith
US3978248A (en) * 1970-12-18 1976-08-31 Hitachi, Ltd. Method for manufacturing composite sintered structure
US3968193A (en) * 1971-08-27 1976-07-06 International Business Machines Corporation Firing process for forming a multilayer glass-metal module
JPS4876059A (xx) * 1972-01-14 1973-10-13
US4039338A (en) * 1972-12-29 1977-08-02 International Business Machines Corporation Accelerated sintering for a green ceramic sheet
US3948706A (en) * 1973-12-13 1976-04-06 International Business Machines Corporation Method for metallizing ceramic green sheets
US4109377A (en) * 1976-02-03 1978-08-29 International Business Machines Corporation Method for preparing a multilayer ceramic
US4030190A (en) * 1976-03-30 1977-06-21 International Business Machines Corporation Method for forming a multilayer printed circuit board
US4289719A (en) * 1976-12-10 1981-09-15 International Business Machines Corporation Method of making a multi-layer ceramic substrate
US4413061A (en) * 1978-02-06 1983-11-01 International Business Machines Corporation Glass-ceramic structures and sintered multilayer substrates thereof with circuit patterns of gold, silver or copper
JPS5820160B2 (ja) * 1978-06-17 1983-04-21 日本碍子株式会社 メタライズ層を備えたセラミツクス体
FR2435883A1 (fr) * 1978-06-29 1980-04-04 Materiel Telephonique Circuit integre hybride et son procede de fabrication
JPS55133597A (en) * 1979-04-06 1980-10-17 Hitachi Ltd Multilayer circuit board
US4313262A (en) * 1979-12-17 1982-02-02 General Electric Company Molybdenum substrate thick film circuit
US4336088A (en) * 1980-06-30 1982-06-22 International Business Machines Corp. Method of fabricating an improved multi-layer ceramic substrate
US4340436A (en) * 1980-07-14 1982-07-20 International Business Machines Corporation Process for flattening glass-ceramic substrates
JPS57122592A (en) * 1981-01-23 1982-07-30 Tokyo Shibaura Electric Co Method of producing hybrid integrated circuit
US4434134A (en) * 1981-04-10 1984-02-28 International Business Machines Corporation Pinned ceramic substrate
JPS58176997A (ja) * 1982-04-12 1983-10-17 株式会社日立製作所 複数層配線構造及びサ−マルヘツド
US4406722A (en) * 1982-05-03 1983-09-27 International Business Machines Corp. Diffusion bonding of dissimilar ceramics
JPS58207699A (ja) * 1982-05-28 1983-12-03 株式会社日立製作所 配線回路基板の製造方法
JPS59995A (ja) * 1982-06-16 1984-01-06 富士通株式会社 銅導体多層構造体の製造方法

Also Published As

Publication number Publication date
DE3570013D1 (en) 1989-06-08
EP0201583A1 (en) 1986-11-20
JPH0213958B2 (xx) 1990-04-05
WO1986003337A1 (en) 1986-06-05
US4645552A (en) 1987-02-24
JPS62501181A (ja) 1987-05-07
EP0201583B1 (en) 1989-05-03

Similar Documents

Publication Publication Date Title
IL76759A (en) Process for fabricating dimensionally stable interconnect electronic circuit boards
DE3570235D1 (en) Method for producing multilayer ceramic circuit board
EP0059434A3 (en) Multi-layer printed circuit board and process for production thereof
GB2195269B (en) Process for making substrates for printed circuit boards
EP0231737A3 (en) Continuous process for the manufacture of printed circuit boards
EP0178864A3 (en) Process for producing copper through-hole printed circuit board
EP0186550A3 (en) Process for producing multilayer ceramic circuit board with copper
GB2131233B (en) Fabricating shaped printed circuit boards
EP0231795A3 (en) Method for making printed circuit boards
DE3569450D1 (en) Process for making circuit boards
ZA873846B (en) Method for manufacture of printed circuit boards
GB8515772D0 (en) Electronic circuit board
GB8412606D0 (en) Printed circuit boards
GB2141879B (en) Manufacture of printed circuit boards
ZA873844B (en) Method for manufacture of printed circuit boards
GB8630392D0 (en) Producing printed circuit boards
GB2100520B (en) Making conductive holes in printed circuit boards
GB8504266D0 (en) Making printed circuit boards
ZA854662B (en) Multi-layer circuit boards
GB2118369B (en) Making printed circuit boards
EP0271163A3 (en) Manufacturing method of electrical circuit boards
GB2161325B (en) Method for making interconnection circuit boards
GB8815275D0 (en) Method of manufacturing printed circuit boards
GB2147460B (en) Printed circuit board manufacture
ZA873845B (en) Method for manufacture of printed circuit boards

Legal Events

Date Code Title Description
HC Change of name of proprietor(s)
RH1 Patent not in force