IL146159A0 - Method and apparatus for thread switching within a multi-threaded processor - Google Patents

Method and apparatus for thread switching within a multi-threaded processor

Info

Publication number
IL146159A0
IL146159A0 IL14615900A IL14615900A IL146159A0 IL 146159 A0 IL146159 A0 IL 146159A0 IL 14615900 A IL14615900 A IL 14615900A IL 14615900 A IL14615900 A IL 14615900A IL 146159 A0 IL146159 A0 IL 146159A0
Authority
IL
Israel
Prior art keywords
threaded processor
thread switching
thread
switching
threaded
Prior art date
Application number
IL14615900A
Other languages
English (en)
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of IL146159A0 publication Critical patent/IL146159A0/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3808—Instruction prefetching for instruction reuse, e.g. trace cache, branch target cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842—Speculative instruction execution
    • G06F9/3844—Speculative instruction execution using dynamic branch prediction, e.g. using branch history tables
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Advance Control (AREA)
  • Multi Processors (AREA)
  • Debugging And Monitoring (AREA)
IL14615900A 1999-04-29 2000-04-20 Method and apparatus for thread switching within a multi-threaded processor IL146159A0 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/302,633 US6535905B1 (en) 1999-04-29 1999-04-29 Method and apparatus for thread switching within a multithreaded processor
PCT/US2000/010800 WO2000067113A2 (en) 1999-04-29 2000-04-20 Method and apparatus for thread switching within a multithreaded processor

Publications (1)

Publication Number Publication Date
IL146159A0 true IL146159A0 (en) 2002-07-25

Family

ID=23168579

Family Applications (2)

Application Number Title Priority Date Filing Date
IL14615900A IL146159A0 (en) 1999-04-29 2000-04-20 Method and apparatus for thread switching within a multi-threaded processor
IL146159A IL146159A (en) 1999-04-29 2001-10-25 Method and apparatus for thread switching within a

Family Applications After (1)

Application Number Title Priority Date Filing Date
IL146159A IL146159A (en) 1999-04-29 2001-10-25 Method and apparatus for thread switching within a

Country Status (10)

Country Link
US (8) US6535905B1 (xx)
EP (1) EP1185924B1 (xx)
CN (2) CN1196060C (xx)
AU (1) AU4480200A (xx)
BR (1) BR0010602B1 (xx)
DE (1) DE60032481T2 (xx)
HK (1) HK1042363A1 (xx)
IL (2) IL146159A0 (xx)
TW (1) TW476915B (xx)
WO (1) WO2000067113A2 (xx)

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