IE83726B1 - Machining of semiconductor materials - Google Patents

Machining of semiconductor materials Download PDF

Info

Publication number
IE83726B1
IE83726B1 IE2002/0315A IE20020315A IE83726B1 IE 83726 B1 IE83726 B1 IE 83726B1 IE 2002/0315 A IE2002/0315 A IE 2002/0315A IE 20020315 A IE20020315 A IE 20020315A IE 83726 B1 IE83726 B1 IE 83726B1
Authority
IE
Ireland
Prior art keywords
machining
substrate
laser
metal
metallising
Prior art date
Application number
IE2002/0315A
Other versions
IE20020315A1 (en
Inventor
Boyle Adrian
Original Assignee
Xsil Technology Limited
Filing date
Publication date
Application filed by Xsil Technology Limited filed Critical Xsil Technology Limited
Priority to IE2002/0315A priority Critical patent/IE83726B1/en
Priority to EP02800144A priority patent/EP1433195B1/en
Priority to CNB028193709A priority patent/CN100369235C/en
Priority to AU2002362491A priority patent/AU2002362491A1/en
Priority to KR1020047004824A priority patent/KR100913510B1/en
Priority to JP2003532249A priority patent/JP2005504445A/en
Priority to AT06004748T priority patent/ATE537558T1/en
Priority to EP06004748A priority patent/EP1677346B1/en
Priority to AT02800144T priority patent/ATE327572T1/en
Priority to PCT/EP2002/011001 priority patent/WO2003028949A2/en
Priority to US10/490,985 priority patent/US8048774B2/en
Priority to DE60211728T priority patent/DE60211728T2/en
Priority to MYPI20031530 priority patent/MY135361A/en
Priority to TW92109598A priority patent/TWI224370B/en
Publication of IE20020315A1 publication Critical patent/IE20020315A1/en
Publication of IE83726B1 publication Critical patent/IE83726B1/en
Priority to JP2009191614A priority patent/JP2010016392A/en

Links

Description

Machining of semiconductor materials Introduction The invention relates to machining materials, such as semiconductor wafers, in the electronics industry.
Statements of Invention According to a first aspect of the invention, there is provided a method of machining a substrate comprising the steps of: (a) using a laser emitting visible or ultraviolet radiation to machine 21 via in a first surface of the substrate to a predetermined depth from the first surface that is less than a full depth of the substrate: (b) metallising the via with metal; and (C) subsequently removing material from a second surface of the substrate opposed to the first surface to the predetermined depth from the first surface to expose a portion of the metal in the via at the second surface using one of: mechanically removing material, particularly by lapping and polishing; chemical etching: plasma etching; and laser ablation.
In one embodiment, step (a) comprises laser machining with a laser emitting radiation of a wavelength of one of substantially 266nm, 355nm and 532nm.
In another embodiment, the step of machining a via comprises machining in a path forming a circle or a plurality of concentric circles to form a via centred on a centre of the circle or the plurality of concentric circles. 1 In a further embodiment, the step of metallising the via includes a prior step of oxidising the via.
In one embodiment, the substrate is a semiconductor.
In a further embodiment. the substrate comprises layers of silicon and metal material.
In a further embodiment, step (a) comprises laser machining with a Q—switched laser.
According to a second aspect of the invention, there is provided a substrate machining system comprising: laser machining means for emitting visible or ultraviolet radiation for machining a via in a first surface of a substrate to a predetermined depth from the first surface that is less than a full depth of the substrate; metallising means for metallising the via and material removal means comprising at least one of mechanical material removal means, particularly lapping and polishing means; chemical etching means; plasma etching means and laser ablation for removing material from a second surface of the substrate opposed to the first surface to the predetermined depth from the first surface to expose metal in the via at the second surface.
In one embodiment, the system further comprises oxidising means for oxidising the via prior to metallization.
In a further embodiment, the system is arranged for machining semiconductor material.
In another embodiment, the system is arranged for machining a substrate comprising layers of silicon and metal material.
In one embodiment, the laser machining means comprises a Q—switched laser.
In another embodiment, the laser machining means is arranged to emit radiation of one of the wavelengths of substantially 266nm. 355nm and 532nm.
Detailed Description of the Drawings The invention will be more clearly understood from the following description of some embodiments thereof, given by way of example only with reference to the accompanying drawings in which: Fig. 1 is a plan view of a semiconductor wafer before dicing: Fig. 2 is a diagrammatic cross—sectional view showing regions and layers of the wafer, and also a laser-machined channel; Fig. 3 is a diagrammatic side view of two sides; Figs. 4(a), 4(b) and 4(c) are a series of diagrams showing a machining process of the invention; Figs. 5(a) and 5(b) are diagrams illustrating an alternative process of the invention; and Figs. 6(a), 6(b), and 6(0) are diagrams illustrating a further process of the invention.
Referring to Fig. 1 part of a semiconductor wafer l is shown. It consists of integrated circuit dies 2 separated by streets 3. Each die 2 comprises an active region 4 supported by a support region 5 providing mechanical support during manufacture.
Within the active region 4 there is an upper active circuit layer 7 and a lower final support layer 6.
Generally. the active device region 4 is of thickness less than 100 microns. Generally. the active region 4 may be an integrated electronic circuit but may also be an optical waveguide circuit.
For large area wafers, e.g. 300mm wafers, it is a requirement that the wafer is sufficiently thick that it is mechanically robust. Typically this thickness may be in the region of 500 microns to 800 microns. Heretofore, dicing of the wafer has been performed with dicing saws and throughput is a function of machining speed. alignment time, and yield.
The invention employs an alternative technique using a combination of laser street machining and backside wafer thinning.
In the first step, a laser is used to scribe a channel 8 (Fig. 2) of depth d and width w into the street region. To achieve a high machining speed a high power q switched laser operating at 266nm, 355nm or 532nm may be used. Using an appropriate set of laser, scan, and optical parameters the street may be machined at high speed without affecting the functionality of the devices. Typically. trenches of 20 to 100 microns depth may be machined at speeds up to 80mm/s with the correct laser settings.
Once the street is machined to the required depth, the backside of the wafer is thinned through lap and polish. through chemical etching, or plasma etch. This provides final dies 2 shown in Fig. 3. The result is a diced wafer. The active layer 7 is supported by the final support layer 6.
In another embodiment of this invention illustrated in Figs 4(a) to Me), a Q-switched laser beam 9 is used to drill microvia features 10 through the active device 7 and supporting substrate layer 6 down to the supporting structure 5 below it as shown in Fig 4(a). The microvias are then metallised, to facilitate electrical connection of the active device 7.
Drilling of micro—vias with pulsed lasers may be performed using two methods. In the first method a stationary beam is used (pixel vias): Using this technique a number of laser pulses are delivered to a single point on the substrate. The number of pulses required to reach a certain depth depends on their energy. This technique is suitable for vias smaller than approximately 100 microns diameter. The exact via diameter depends on the laser beam diameter, optical and laser parameters and material properties. In another method a beam is scanned along the outer profile of the via.
This technique is suitable for vias larger than approximately 100 microns diameter.
The laser moves in a circular pattern, in one or more concentric circles. Several repetitions might be required to reach the required depth. The via diameter is a function of the radius of the outer circle and the beam diameter. Such a via is referred to as a scanned or trepanned via.
When the microvia, be it a pixel or trepanned via, has been machined to the required depth in the wafer material a blind microvia structure is formed which is subsequently filled with metal 11 in order to provide a conducting pathway as shown in Fig. 4(bl.
The backside of the wafer is then thinned (Fig. 4(c)) through lap and polish. through chemical etching, or plasma etch in order to expose the metal layer in the laser machined microvia, thus permitting electrical connection of device layers to power and ground sources.
Referring to Figs. 5(a) and 5(b), in a further embodiment of the invention, in the case where the wafer on which the active devices are located is thin (typically < 300 microns), vias are laser machined through the active layer 20 and completely through the supporting substrate 21. The via 22 is then metallised with metal 23 to facilitate electrical connection (Fig. 5 (19)).
Referring to Figs. 6(a) to 6(c), in a further embodiment of the invention. the active device consists of a series of alternative silicon 32 and metal 33 layers as shown in Fig 6(a). A Q—switched laser is used to drill a microvia structure 34 from the top of the active device 35, through this active device layer and into the supporting substrate (Fig. 6(b)). The microvia is then metallised with metal 37.
The backside of the wafer is then thinned (Fig. 6(c)) through lap and polish. through chemical etching, or plasma etch in order to expose the metal layer in the laser machined microvia, thus permitting electrical connection of device layers to power and ground sources.
The invention is not limited to the embodiments described but may be varied in construction and detail.

Claims (1)

1.Claims A method of machining a substrate comprising the steps of: (a) using a laser emitting visible or ultraviolet radiation to machine a via in a first surface of the substrate to a predetermined depth from the first surface that is less than a full depth of the substrate; (b) metallising the via with metal; and (c) subsequently removing material from a second surface of the substrate opposed to the first surface to the predetermined depth from the first surface to expose a portion of the metal in the via at the second surface using one of: mechanically removing material, particularly by lapping and polishing: chemical etching: plasma etching; and laser ablation. A method as claimed in claim 1. wherein step (a) comprises laser machining with a laser emitting radiation of a wavelength of one of substantially 266nm. 355nm and 532nm. A method as claimed in claims 1 or 2, wherein the step of machining a via comprises machining in a path forming a circle or a plurality of concentric circles to form a via centred on a centre of the circle or the plurality of concentric circles. A method as claimed in any of the preceding claims, wherein the step of metallising the via includes a prior step of oxidising the via. A method as claimed in any of the preceding claim, wherein the substrate is a semiconductor. A method as claimed in any of the preceding claims, wherein the substrate comprises layers of silicon and metal material. A method as claimed in any of the preceding claims, wherein step (a) comprises laser machining with a Q—switched laser. A substrate machining system comprising: laser machining means for emitting visible or ultraviolet radiation for machining a via in a first surface of a substrate to a predetermined depth from the first surface that is less than a full depth of the substrate; metallising means for metallising the via and material removal means comprising at least one of mechanical material removal means. particularly lapping and polishing means: chemical etching means: plasma etching means and laser ablation for removing material from a second surface of the substrate opposed to the first surface to the predetermined depth from the first surface to expose metal in the via at the second surface. A system as claimed in claim 8, further comprising oxidising means for oxidising the via prior to mctallization. A system as claimed in claims 8 or 9. arranged for machining semiconductor material. A system as claimed in any of claims 8 to 10. arranged for machining a substrate comprising layers of silicon and metal material. A system as claimed in any of claims 8 to 11, wherein the laser machining means comprises a Q—switched laser. A system as claimed in any of claims 8 to 12, wherein the laser machining means is arranged to emit radiation of one of the wavelengths of substantially 266nm, 355nm and 532nm. A method of machining a substrate substantially as described herein with reference to and as shown in any of
IE2002/0315A 2001-10-01 2002-04-26 Machining of semiconductor materials IE83726B1 (en)

Priority Applications (15)

Application Number Priority Date Filing Date Title
IE2002/0315A IE83726B1 (en) 2002-04-26 Machining of semiconductor materials
EP06004748A EP1677346B1 (en) 2001-10-01 2002-10-01 Machining substrates, particularly semiconductor wafers
AT02800144T ATE327572T1 (en) 2001-10-01 2002-10-01 METHOD AND DEVICE FOR PROCESSING SUBSTRATES
AU2002362491A AU2002362491A1 (en) 2001-10-01 2002-10-01 Method of machining substrates
KR1020047004824A KR100913510B1 (en) 2001-10-01 2002-10-01 Machining substrates, particularly semiconductor wafers
JP2003532249A JP2005504445A (en) 2001-10-01 2002-10-01 Processing of substrates, especially semiconductor wafers
AT06004748T ATE537558T1 (en) 2001-10-01 2002-10-01 PROCESSING OF SUBSTRATES, PARTICULARLY SEMICONDUCTOR SUBSTRATES
EP02800144A EP1433195B1 (en) 2001-10-01 2002-10-01 Method and apparatus for machining substrates
CNB028193709A CN100369235C (en) 2001-10-01 2002-10-01 Machining substrates, particularly semiconductor wafers
PCT/EP2002/011001 WO2003028949A2 (en) 2001-10-01 2002-10-01 Method of machining substrates
US10/490,985 US8048774B2 (en) 2001-10-01 2002-10-01 Methods and systems for laser machining a substrate
DE60211728T DE60211728T2 (en) 2001-10-01 2002-10-01 METHOD AND DEVICE FOR PROCESSING SUBSTRATES
MYPI20031530 MY135361A (en) 2002-04-26 2003-04-23 Machining substrates, particularly semiconductor wafers
TW92109598A TWI224370B (en) 2002-04-26 2003-04-24 Machining of semiconductor materials
JP2009191614A JP2010016392A (en) 2001-10-01 2009-08-21 Processing of substrate, especially semiconductor wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IE2002/0315A IE83726B1 (en) 2002-04-26 Machining of semiconductor materials

Publications (2)

Publication Number Publication Date
IE20020315A1 IE20020315A1 (en) 2003-10-29
IE83726B1 true IE83726B1 (en) 2004-12-30

Family

ID=

Similar Documents

Publication Publication Date Title
EP1433195B1 (en) Method and apparatus for machining substrates
US8809120B2 (en) Method of dicing a wafer
EP1404481B1 (en) A laser machining system and method
KR102024364B1 (en) Wafer dicing using hybrid multi-step laser scribing process with plasma etch
US9379015B2 (en) Wafer processing method
US9040389B2 (en) Singulation processes
TWI351715B (en) Semiconductor wafer processing method
US11848225B2 (en) Apparatus for edge trimming of semiconductor wafers
US20050101108A1 (en) Semiconductor wafer dividing method
US20060148211A1 (en) Wafer dividing method
JP6704957B2 (en) Substrate processing method
JP2003179005A (en) Method and device for separating semiconductor devices
US9911655B2 (en) Method of dicing a wafer and semiconductor chip
US10748801B2 (en) Carrier arrangement and method for processing a carrier by generating a crack structure
US10373855B2 (en) Method for processing a wafer and method for processing a carrier
IE83726B1 (en) Machining of semiconductor materials
IE20020315A1 (en) Machining of semiconductor materials
CN117594529A (en) Wafer processing method
IE83783B1 (en) A laser machining system and method