IE20020315A1 - Machining of semiconductor materials - Google Patents

Abstract

A formation (3) in a first surface of a substrate is machined by an ultraviolet or visible radiation laser, to a predetermined depth that is less than a full depth of the substrate; and material (5) is removed from a second surface of the substrate opposed to the first surface to the predetermined depth from the first surface to communicate with the formation. Material may be removed by, for example, lapping and polishing, chemical etching, plasma etching or laser ablation. The invention has application in, for example, dicing semiconductor wafers or forming metallised vias in wafers. <Figure 4(c)>

Description

"Machining of semiconductor materials’ Introduction The invention relates to machining materials, such as semiconductor wafers, in the electronics industry.

Statements of Invention According to the invention, there is provided a method of machining a substrate comprising the steps of:(a) machining a formation in the substrate to less than the full depth of the substrate; and (b) removing material from the opposite side to reach the machined formation.

In one embodiment, the formation is a channel, and step (b) completes a cut in the 20 channel.

In another embodiment, step (a) machines a grid of channels, and step (b) completes dicing of the substrate.

In a further embodiment, the formation is a via, the method comprises the further step of metallising the via, and step (c) is performed to expose metal in the via on the opposite side.

In one embodiment, the step (b) is performed by mechanical removal such as lap and polish. iiktyk ufi ttolC i ‘‘.•PEN TO PUBLIC INSPECTION : UNDER SECTION 28 AND RULE 23 : JNLNftj3S£......... ΙΕ υ 2 03 1 5 -2In another embodiment, step (b) is performed by chemical etching.

In a further embodiment, step (b) is performed by plasma etching.

In one embodiment, the substrate is of silicon material.

In another embodiment, the substrate comprises layers of semiconductor and metal material.

According to another aspect, the invention provides a machining system comprising means for performing a machining method as defined above.

In a further aspect, the invention provides a method of providing a conductor through a substrate comprising the steps of laser drilling a via through the substrate and metallising the via.

Detailed Description of the Drawings The invention will be more clearly understood from the following description of some embodiments thereof, given by way of example only with reference to the accompanying drawings in which :Fig. 1 is a plan view of a semiconductor wafer before dicing; Fig. 2 is a diagrammatic cross-sectional view showing regions and layers of the wafer, and also a laser-machined channel; Fig. 3 is a diagrammatic side view of two sides; ΙΕ η 2 15 -3Figs. 4(a), 4(b) and 4(c) are a series of diagrams showing a machining process of the invention; Figs. 5(a) and 5(b) are diagrams illustrating an alternative process of the invention; and Figs. 6(a), 6(b), and 6(c) are diagrams illustrating a further process of the invention.

Referring to Fig. 1 part of a semiconductor wafer 1 is shown. It consists of integrated circuit dies 2 separated by streets 3. Each die 2 comprises an active region 4 supported by a support region 5 providing mechanical support during manufacture. Within the active region 4 there is an upper active circuit layer 7 and a lower final support layer 6.

Generally, the active device region 4 is of thickness less than 100 microns. Generally, the active region 4 may be an integrated electronic circuit but may also be an optical waveguide circuit.

For large area wafers, e.g. 300mm wafers, it is a requirement that the wafer is sufficiently thick that it is mechanically robust. Typically this thickness may be in the region of 500 microns to 800 microns. Heretofore, dicing of the wafer has been performed with dicing saws and throughput is a function of machining speed, alignment time, and yield.

The invention employs an alternative technique using a combination of laser street machining and backside wafer thinning.

In the first step, a laser is used to scribe a channel 8 (Fig. 2) of depth d and width w into the street region. To achieve a high machining speed a high power q switched -4laser operating at 266nm, 355nm or 532nm may be used. Using an appropriate set of laser, scan, and optical parameters the street may be machined at high speed without affecting the functionality of the devices. Typically, trenches of 20 to 100 microns depth may be machined at speeds up to 80mm/s with the correct laser settings.

Once the street is machined to the required depth, the backside of the wafer is thinned through lap and polish, through chemical etching, or plasma etch. This provides final dies 2 shown in Fig. 3. The result is a diced wafer. The active layer 7 is supported by the final support layer 6.

In another embodiment of this invention illustrated in Figs 4(a) to 4(c), a Q-switched laser beam 9 is used to drill microvia features 10 through the active device 7 and supporting substrate layer 6 down to the supporting structure 5 below it as shown in Fig 4(a). The microvias are then metallised, to facilitate electrical connection of the active device 7.

Drilling of micro-vias with pulsed lasers may be performed using two methods. In the first method a stationary beam is used (pixel vias): Using this technique a number of laser pulses are delivered to a single point on the substrate. The number of pulses required to reach a certain depth depends on their energy. This technique is suitable for vias smaller than approximately 100 microns diameter. The exact via diameter depends on the laser beam diameter, optical and laser parameters and material properties. In another method a beam is scanned along the outer profile of the via. This technique is suitable for vias larger than approximately 100 microns diameter.

The laser moves in a circular pattern, in one or more concentric circles. Several repetitions might be required to reach the required depth. The via diameter is a function of the radius of the outer circle and the beam diameter. Such a via is referred to as a scanned or trepanned via.

IE Ο 2 0 3 j -5When the microvia, be it a pixel or trepanned via, has been machined to the required depth in the wafer material a blind microvia structure is formed which is subsequently filled with metal 11 in order to provide a conducting pathway as shown in Fig. 4(b). The backside of the wafer is then thinned (Fig. 4(c)) through lap and polish, through chemical etching, or plasma etch in order to expose the metal layer in the laser machined microvia, thus permitting electrical connection of device layers to power and ground sources.

Referring to Figs. 5(a) and 5(b), in a further embodiment of the invention, in the case 10 where the wafer on which the active devices are located is thin (typically < 300 microns), vias are laser machined through the active layer 20 and completely through the supporting substrate 21. The via 22 is then metallised with metal 23 to facilitate electrical connection (Fig. 5(b)).

Referring to Figs. 6(a) to 6(c), in a further embodiment of the invention, the active device consists of a series of alternative silicon 32 and metal 33 layers as shown in Fig 6(a). A Q-s witched laser is used to drill a microvia structure 34 from the top of the active device 35, through this active device layer and into the supporting substrate 36 (Fig. 6(b)). The microvia is then metallised with metal 37.

The backside of the wafer is then thinned (Fig. 6(c)) through lap and polish, through chemical etching, or plasma etch in order to expose the metal layer in the laser machined microvia, thus permitting electrical connection of device layers to power and ground sources.

The invention is not limited to the embodiments described but may be varied in construction and detail.

Claims (7)

1. Claims 1. A method of machining a substrate comprising the steps of:5 (a) machining a formation in the substrate to less than the full depth of the substrate; and (b) removing material from the opposite side to reach the machined formation.
2. 2. A method as claimed in claim 1, wherein the formation is a channel, and step (b) completes a cut in the channel.
3. 3. A method as claimed in claim 2, wherein step (a) machines a grid of channels, 15 and step (b) completes dicing of the substrate.
4. 4. A method as claimed in claim 1, wherein the formation is a via, the method comprises the further step of metallising the via, and step (c) is performed to expose metal in the via on the opposite side.
5. 5. A method as claimed in any preceding claim, wherein the step (b) is performed by mechanical removal such as lap and polish.
6. 6. A method as claimed in any of claims 1 to 4, wherein step (b) is performed by 25 chemical etching.
7. 7. A method as claimed in any of claims 1 to 4, wherein step (b) is performed by plasma etching. IE Ο 203 j 5 -78. A method as claimed in any preceding claim, wherein the substrate is of silicon material. 9. A method as claimed in any of claims 1 to 7, wherein the substrate comprises 5 layers of semiconductor and metal material. 10. A machining method substantially as described with reference to Figs. 1 to 3. 11. A machining method substantially as described with reference to Figs. 4(a) to 10 4(c). 12. A machining method substantially as described with reference to Figs. 5(a) to 5(b). 15 13. A machining method substantially as described with reference to Figs. 6(a) to 6(c). 14. A machining system comprising means for performing a machining method as claimed in any preceding claim.