IE40171B1 - Pulse rejection circuit - Google Patents

Pulse rejection circuit

Info

Publication number
IE40171B1
IE40171B1 IE1894/74A IE189474A IE40171B1 IE 40171 B1 IE40171 B1 IE 40171B1 IE 1894/74 A IE1894/74 A IE 1894/74A IE 189474 A IE189474 A IE 189474A IE 40171 B1 IE40171 B1 IE 40171B1
Authority
IE
Ireland
Prior art keywords
output
negative
capacitor
positive
time
Prior art date
Application number
IE1894/74A
Other languages
English (en)
Other versions
IE40171L (en
Original Assignee
Northern Telecom Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Northern Telecom Ltd filed Critical Northern Telecom Ltd
Publication of IE40171L publication Critical patent/IE40171L/xx
Publication of IE40171B1 publication Critical patent/IE40171B1/xx

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R29/00Arrangements for measuring or indicating electric quantities not covered by groups G01R19/00 - G01R27/00
    • G01R29/02Measuring characteristics of individual pulses, e.g. deviation from pulse flatness, rise time or duration
    • G01R29/027Indicating that a pulse characteristic is either above or below a predetermined value or within or beyond a predetermined range of values
    • G01R29/0273Indicating that a pulse characteristic is either above or below a predetermined value or within or beyond a predetermined range of values the pulse characteristic being duration, i.e. width (indicating that frequency of pulses is above or below a certain limit)

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Amplifiers (AREA)
  • Power Conversion In General (AREA)
  • Manipulation Of Pulses (AREA)
  • Dc Digital Transmission (AREA)
IE1894/74A 1973-09-12 1974-09-12 Pulse rejection circuit IE40171B1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CA180,879A CA966198A (en) 1973-09-12 1973-09-12 Pulse rejection circuit

Publications (2)

Publication Number Publication Date
IE40171L IE40171L (en) 1975-03-12
IE40171B1 true IE40171B1 (en) 1979-03-28

Family

ID=4097793

Family Applications (1)

Application Number Title Priority Date Filing Date
IE1894/74A IE40171B1 (en) 1973-09-12 1974-09-12 Pulse rejection circuit

Country Status (8)

Country Link
JP (1) JPS5065163A (enrdf_load_stackoverflow)
CA (1) CA966198A (enrdf_load_stackoverflow)
ES (1) ES430002A1 (enrdf_load_stackoverflow)
FR (1) FR2243557A1 (enrdf_load_stackoverflow)
GB (1) GB1479975A (enrdf_load_stackoverflow)
IE (1) IE40171B1 (enrdf_load_stackoverflow)
IT (1) IT1020392B (enrdf_load_stackoverflow)
SE (1) SE390473B (enrdf_load_stackoverflow)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5948589B2 (ja) * 1975-06-23 1984-11-27 株式会社日立製作所 画像信号の2値化変換回路
JPS5235966A (en) * 1975-09-16 1977-03-18 Toshiba Corp Noise killer circuit for mos type integrated circuit
JPS6113690Y2 (enrdf_load_stackoverflow) * 1979-06-11 1986-04-28
JPS58173928U (ja) * 1982-05-17 1983-11-21 富士通テン株式会社 ロ−バスフイルタ
JPS59134919A (ja) * 1983-01-19 1984-08-02 Asahi Denki Kogyo Kk 誤動作防止回路
JPH01156633U (enrdf_load_stackoverflow) * 1989-03-02 1989-10-27

Also Published As

Publication number Publication date
FR2243557A1 (enrdf_load_stackoverflow) 1975-04-04
JPS5065163A (enrdf_load_stackoverflow) 1975-06-02
IE40171L (en) 1975-03-12
GB1479975A (en) 1977-07-13
DE2441033A1 (de) 1975-03-20
DE2441033B2 (de) 1977-02-24
SE390473B (sv) 1976-12-20
ES430002A1 (es) 1976-09-16
IT1020392B (it) 1977-12-20
SE7411534L (enrdf_load_stackoverflow) 1975-03-13
CA966198A (en) 1975-04-15

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