IE40171L - Pulse rejection circuit - Google Patents

Pulse rejection circuit

Info

Publication number
IE40171L
IE40171L IE741894A IE189474A IE40171L IE 40171 L IE40171 L IE 40171L IE 741894 A IE741894 A IE 741894A IE 189474 A IE189474 A IE 189474A IE 40171 L IE40171 L IE 40171L
Authority
IE
Ireland
Prior art keywords
output
negative
capacitor
positive
time
Prior art date
Application number
IE741894A
Other versions
IE40171B1 (en
Original Assignee
Northern Telecom Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Northern Telecom Ltd filed Critical Northern Telecom Ltd
Publication of IE40171L publication Critical patent/IE40171L/en
Publication of IE40171B1 publication Critical patent/IE40171B1/en

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R29/00Arrangements for measuring or indicating electric quantities not covered by groups G01R19/00 - G01R27/00
    • G01R29/02Measuring characteristics of individual pulses, e.g. deviation from pulse flatness, rise time or duration
    • G01R29/027Indicating that a pulse characteristic is either above or below a predetermined value or within or beyond a predetermined range of values
    • G01R29/0273Indicating that a pulse characteristic is either above or below a predetermined value or within or beyond a predetermined range of values the pulse characteristic being duration, i.e. width (indicating that frequency of pulses is above or below a certain limit)

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Amplifiers (AREA)
  • Manipulation Of Pulses (AREA)
  • Dc Digital Transmission (AREA)
  • Power Conversion In General (AREA)

Abstract

1479975 Transistor pulse circuits NORTHERN TELECOM Ltd 10 Sept 1974 [12 Sept 1973] 39499/74 Heading H3T A circuit for suppressing short interference pulses comprises an amplifier A having a non- inverting input 12 grounded and an inverting input 11 connected thereto by a capacitor 16. When the input signal at 14 is positive, the amplifier output C is negative, keeping the low resistance path 17, 18 open. If the input signal changes to negative this path is blocked by the reverse bias on diode 17. The charge on capacitor 16 which is keeping the amplifier output negative flows away through resistor 15 until after a predetermined time it has fallen to a value where the output goes positive, switching on transistor 20. Thus providing the change of input level lasts for longer than the time set by capacitor 16, it appears in the output delayed by this amount of time, but if it lasts a shorter time it does not appear in the output at all. In modifications, Figs. 2a-2d, not shown, one or two diodes are connected across parts of resistor 15 (which may be a potentiometer) to provide different width thresholds for positive and negative going pulses. These modifications also vary slightly the width of the pulses that are passed. [GB1479975A]
IE1894/74A 1973-09-12 1974-09-12 Pulse rejection circuit IE40171B1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CA180,879A CA966198A (en) 1973-09-12 1973-09-12 Pulse rejection circuit

Publications (2)

Publication Number Publication Date
IE40171L true IE40171L (en) 1975-03-12
IE40171B1 IE40171B1 (en) 1979-03-28

Family

ID=4097793

Family Applications (1)

Application Number Title Priority Date Filing Date
IE1894/74A IE40171B1 (en) 1973-09-12 1974-09-12 Pulse rejection circuit

Country Status (8)

Country Link
JP (1) JPS5065163A (en)
CA (1) CA966198A (en)
ES (1) ES430002A1 (en)
FR (1) FR2243557A1 (en)
GB (1) GB1479975A (en)
IE (1) IE40171B1 (en)
IT (1) IT1020392B (en)
SE (1) SE390473B (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5948589B2 (en) * 1975-06-23 1984-11-27 株式会社日立製作所 Image signal binarization conversion circuit
JPS5235966A (en) * 1975-09-16 1977-03-18 Toshiba Corp Noise killer circuit for mos type integrated circuit
JPS6113690Y2 (en) * 1979-06-11 1986-04-28
JPS58173928U (en) * 1982-05-17 1983-11-21 富士通テン株式会社 lobus filter
JPS59134919A (en) * 1983-01-19 1984-08-02 Asahi Denki Kogyo Kk Circuit for preventing malfunction
JPH01156633U (en) * 1989-03-02 1989-10-27

Also Published As

Publication number Publication date
SE7411534L (en) 1975-03-13
FR2243557A1 (en) 1975-04-04
IT1020392B (en) 1977-12-20
DE2441033A1 (en) 1975-03-20
SE390473B (en) 1976-12-20
IE40171B1 (en) 1979-03-28
ES430002A1 (en) 1976-09-16
JPS5065163A (en) 1975-06-02
DE2441033B2 (en) 1977-02-24
GB1479975A (en) 1977-07-13
CA966198A (en) 1975-04-15

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