ES430002A1 - Pulse rejection circuit - Google Patents

Pulse rejection circuit

Info

Publication number
ES430002A1
ES430002A1 ES430002A ES430002A ES430002A1 ES 430002 A1 ES430002 A1 ES 430002A1 ES 430002 A ES430002 A ES 430002A ES 430002 A ES430002 A ES 430002A ES 430002 A1 ES430002 A1 ES 430002A1
Authority
ES
Spain
Prior art keywords
input
terminal
reversing input
devices
reversing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES430002A
Other languages
Spanish (es)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nortel Networks Ltd
Original Assignee
Northern Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Northern Electric Co Ltd filed Critical Northern Electric Co Ltd
Publication of ES430002A1 publication Critical patent/ES430002A1/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R29/00Arrangements for measuring or indicating electric quantities not covered by groups G01R19/00 - G01R27/00
    • G01R29/02Measuring characteristics of individual pulses, e.g. deviation from pulse flatness, rise time or duration
    • G01R29/027Indicating that a pulse characteristic is either above or below a predetermined value or within or beyond a predetermined range of values
    • G01R29/0273Indicating that a pulse characteristic is either above or below a predetermined value or within or beyond a predetermined range of values the pulse characteristic being duration, i.e. width (indicating that frequency of pulses is above or below a certain limit)

Abstract

Improvements in impulse suppression circuit, characterized in that the invention comprises an input terminal to connect-to a pulse source, an operational amplifier having an output terminal, a reversing input and a non-reversing input; a resistive element connected between the input terminal and said reversing input; one capacitance element having one terminal connected to said reversing input and the other terminal connected to said non-reversing input and an output port for connecting to a reference potential source; a pair of opposite polarization unidirectional current devices connected in parallel and through said resistive element; a pair of switching means each connected in series with a respective one of said devices, said switching means being sensitive to the signal appearing at said output terminal to selectively allow current flow through said devices. (Machine-translation by Google Translate, not legally binding)
ES430002A 1973-09-12 1974-09-12 Pulse rejection circuit Expired ES430002A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CA180,879A CA966198A (en) 1973-09-12 1973-09-12 Pulse rejection circuit

Publications (1)

Publication Number Publication Date
ES430002A1 true ES430002A1 (en) 1976-09-16

Family

ID=4097793

Family Applications (1)

Application Number Title Priority Date Filing Date
ES430002A Expired ES430002A1 (en) 1973-09-12 1974-09-12 Pulse rejection circuit

Country Status (8)

Country Link
JP (1) JPS5065163A (en)
CA (1) CA966198A (en)
ES (1) ES430002A1 (en)
FR (1) FR2243557A1 (en)
GB (1) GB1479975A (en)
IE (1) IE40171B1 (en)
IT (1) IT1020392B (en)
SE (1) SE390473B (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5948589B2 (en) * 1975-06-23 1984-11-27 株式会社日立製作所 Image signal binarization conversion circuit
JPS5235966A (en) * 1975-09-16 1977-03-18 Toshiba Corp Noise killer circuit for mos type integrated circuit
JPS6113690Y2 (en) * 1979-06-11 1986-04-28
JPS58173928U (en) * 1982-05-17 1983-11-21 富士通テン株式会社 lobus filter
JPS59134919A (en) * 1983-01-19 1984-08-02 Asahi Denki Kogyo Kk Circuit for preventing malfunction
JPH01156633U (en) * 1989-03-02 1989-10-27

Also Published As

Publication number Publication date
FR2243557A1 (en) 1975-04-04
DE2441033A1 (en) 1975-03-20
GB1479975A (en) 1977-07-13
SE390473B (en) 1976-12-20
DE2441033B2 (en) 1977-02-24
IT1020392B (en) 1977-12-20
IE40171B1 (en) 1979-03-28
CA966198A (en) 1975-04-15
SE7411534L (en) 1975-03-13
IE40171L (en) 1975-03-12
JPS5065163A (en) 1975-06-02

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