HU186939B - Diagnostic arrangement for testing and supervision of data transfer unit - Google Patents

Abstract

The present invention relates to a diagnostic arrangement for testing and monitoring a data transmission apparatus comprising a console display, a pseudo-random signal generator, a distortion meter, a baud-rate generator, a real-time clock generator, and associated interface circuits, and interfaces, and according to the invention, the tested data transmission. device modem circuits and the bus and control bus lines between the data processing control computer and the multiplexer are connected to a microprocessor-controlled diagnostic unit, the diagnostic unit includes a control block having a central unit, a bi-directional system controller, read-only memory, memory, clock, and an internal bus-related memory bus coupling circuit and the same interrupt interrupt controller located on the internal bus to the console display signal and the computer connected to lines, and the diagnostic bus to the data transmission device is connected to the internal bus via a parallel interface, and the pseudo-random signal generator and the distortion meter are connected to the internal bus, and one of the outputs of the baud-rate generator is connected to it, the other output is connected to the distortion meter and the pseudo random signal generator is connected to the real time clock generator, and the multiplexer has a control input for selecting between the internal bus controlled test / monitor modes. AODRESS C -1-

Description

The present invention relates to a diagnostic arrangement for testing and monitoring a data transmission device comprising a console display, a pseudorandom signal generator, a distortion meter, a baud-rate generator, a real-time clock generator and interfaces thereto. The diagnostic arrangement of the present invention can be used in a standalone embodiment to monitor and test multiple lines of a data transmission line or, in the case of a group of data transmission equipment. In the latter case, it is necessary to incorporate interface units in the data transmission device which ensure their simultaneous connection to the bus created by the diagnostic device. It is known that transmission channels are the most delicate points of data transmission systems. Standard transmission lines are used for transmission channels, and their characteristics vary over time. Noise, amplitude and phase distortions present on the lines can greatly distort the information transmitted. In order to reduce the resulting malfunctions, line algorithms are used which have certain error-protecting properties. However, the reliability of TAF systems using a large number of lines is still not satisfactory.

Known solutions can be divided into three groups:

1. Audio tests

2. Digital tests

3. Algorithm simulations and monitors.

Audio tests: They are capable of performing measurements on an audio frequency channel and do not provide the required information from a system perspective.

Digital Tests: Provide laboratory testing of data transfer equipment. (Usually, a line is used for measurements that does not properly model the actual telephone line).

Algorithm Tests and Monitors: These devices provide the most information about data networks, but they also have features that make them difficult to use in a computer environment. These disadvantages include:

- During verification, the data transmission equipment must be disconnected from the computer (or terminal) and the desired measurement set-up must be physically created.

- Only one data transmission device can be connected to them at a time.

- Do not ensure that test results are directly communicated to the computer.

It is an object of the present invention to provide a diagnostic arrangement that informs operators or the computer directly about the state of data networks, if necessary, and provides rapid, reliable testing if required.

SUMMARY OF THE INVENTION The present invention is solved by providing a diagnostic arrangement comprising a console display, a pseudorandom signal generator, a distortion meter, a baud-rate generator, a real-time clock generator and associated interface circuits, and interfaces, and the bus and control bus lines between the circuits and the computer controlling the data processing are connected via a multiplexer to a microprocessor-controlled diagnostic unit, the diagnostic unit comprising a control unit comprising a central unit, bi-directional system controller, read-only memory, memory, clock a connected memory bus coupler circuit and same interrupt controller are located, the internal bus is connected to the console display signal and lines to the computer and the diagnostic bus to the data transmission device is connected to the internal bus via a parallel interface, and the pseudorandom signal generator and the distortion meter are connected to the internal bus, and one of the outputs of the baud rate generator is connected to the other. the pseudorandom signal generator is coupled to the real-time clock generator, and the multiplexer has a control input for selecting between test / monitor modes controlled from the internal bus.

A preferred embodiment of the diagnostic arrangement is for use in a multicast data transmission apparatus having a plurality of data transmission apparatus, each comprising a multiplexer whose control input is connected to the test / monitor wire via the address recognition circuit connected to the diagnostic bus; connects lines between the computer and modem circuits to the diagnostic bus.

The arrangement according to the invention is capable of performing digital tests as well as algorithm checks and monitors by eliminating the drawbacks listed above by providing an independent diagnostic system with the associated data transmission equipment. This ensures the flow of information between the system data transfer equipment and the diagnostic unit without physically changing the system.

The diagnostic arrangement of the present invention will now be described in detail with reference to an embodiment, based on the drawing. In the drawing it is

FIG. 1 is a general outline of a remote data processing system in which an arrangement according to the invention may be provided, a

Figure 2 is a schematic diagram of the blocks facilitating connection to the diagnostic bus in a data transmission device of the arrangement of Figure 1, and

Figure 3 is a general block diagram of a diagnostic unit according to the invention.

In order to understand the design of the system arrangement of the present invention, it is necessary to emerge from the environment to which it is attached or of which it forms an integral part.

Referring first to Figure 1, the remote processing computer 21 is connected via a plurality of V24 / 28 interfaces to a multiplexed data transmission device 20 consisting of n numbered data transmission devices 22a to 22n, each connected via a telephone line. remote stations. In the data grouping data transfer group 20, it is further arranged in detail 24

The diagnostic bus -2186 939 interconnects each of the data transmission devices 22a to 22n and a common microprocessor-controlled diagnostic unit 30 to which a console display 23 for operating functions is connected.

In order for the diagnostic bus 24 to communicate properly with each of the data transmission devices 22, the internal configuration of the data transmission devices 22

2.

The connection of the V24 / 28 interface is made possible by a converter unit implementing TTL / V.28 interface, which is capable of two-way traffic. The standard modem circuits 35, which allow connection to telephone lines, are connected to the converter unit 34 via a multiplexer 32. The output bus of the multiplexor 32 is also connected to a bus driver 33, and the bus driver 33 also receives bus lines connecting the modem circuits 35 to the converter unit 34. The multiplexor 32 and the bus driver control input 33 are coupled to an address recognition circuit 31 set by the address line of the diagnostic bus 24. The diagnostic bus 24 also includes a test / monitor line, the state of which is critical for the task performed by the diagnostic unit 30.

The outputs of the bus driver 33 allow the monitor to perform its function, including the control line 103 for transmitting data and the control line 104 for received data.

The connection to the diagnostic bus 24 also includes some control lines connected to the multiplexer 32.

The functional block diagram of the diagnostic unit 30 shown in Figure 1 is shown in Figure 3.

The main part of the diagnostic unit 30 is a microprocessor-controlled block A, indicated by a dashed portion in the drawing. Block A comprises a central processing unit 1 (microprocessor) to which 2 read-only memory and random access memory 3 are connected. The central unit 1 is coupled to a system controller 5 whose output forms an internal bus which accesses the read-only memory 2 and the memory 3 via a memory bus coupling circuit 4. The central unit 1 and the system controller 5 are provided with clock signals for 7 hours. The internal bus as well as the system controller 5 and the memory bus coupling circuit 4 are coupled to an interrupt controller 6 which generates interrupt signals for operation. The interrupt controller 6 generates interrupts of different duration and purpose, and receives the necessary timing signals from a 8 real-time clock generator which generates the timing signals from its 7 clock signals. The real-time clock generator 8 also transmits control signals to the baudrate generator 9, which produces phase and accuracy signals from the received clock signals to the diagnostic test circuits.

The diagnostic bus 24 is coupled to a parallel enter interface 10 which manages static signals and addresses the data transmission equipment 22. Also connected to the diagnostic bus 24 are two serial interfaces 11 and 11a connected to the output of the baud rate generator 9.

The test units consist of a pseudorandom signal generator 13 and a distortion measuring circuit 14, which are connected via a parallel interface 12 to the internal bus, i.e. the diagnostic bus 24. The console display 23 illustrated in Figure 1 is made possible by a serial interface 15 connected to the data bus and an interface circuit 16 connected thereto.

The connection to the computer 21 is made through a 17 serial interface and an interface 18.

The arrangement according to the invention operates as follows.

Each of the independent data transmission devices 22a to 22n of the grouped data transfer device 20 illustrated in Figure 1 includes a circuit illustrated separately in Figure 2, which allows the diagnostic unit 30 shown in Figure 3 to always be connected via the diagnostic bus 24. contact the person you wish to investigate. This function is enabled by the address recognition circuit 31 shown in FIG. 2 which, upon recognition of its own address, controls the bus driver 33 connected to it and gates the status information of the associated data transmission device to the diagnostic bus 24 and the multiplexer 32 to the correct state. .

Depending on the condition mentioned, the muliplexor 32 switches control of the modem circuit 35 either to the input of the standard V26 / 28 interface (monitor state) or to the diagnostic bus 24 (test state).

The function of the V24 / V28 interface is to restore standard voltage and impedance interface signals. The main part of the diagnostic unit 30 shown in Figure 3 is the microprocessor-controlled block A. In this, the system controller 5 connected to the central unit 1 creates an internal data and control bus which interacts with the various peripheral circuits. The clock signals of the central unit 1 are generated by the clock 7. The memory bus coupling circuit 4 mounts the read-only memory 2 and the memory 3 to the bidirectional internal data bus.

The interrupts required to perform the diagnostic functions are set by the 6 interrupt controllers.

For example, an interrupt may occur in the following cases:

- when measuring timings with the effect of 1 msec signals from the 8 real time clock generators, '

- for time measurements at the 1 second signals of the 8 real time clock generators;

- interrupt! subroutines, when the receive buffers of the serial interfaces 11 and 11a have a ready character and then these characters can be stored in the memory 3;

upon completion of the measurement process of the distortion meter 14;

- a character typed on the display keyboard of the console 23.

The real-time clock generator 8 and the baud-rate generator 9 generate the required timing signals from the 7 clock signals.

The parallel interface 10 handles static signals from the diagnostic bus 24 and addresses the data transmission device 22a to 22n. 11 and 1 la serial interfaces

In test mode -3186 939, the serial data signal is generated, and the serial data arriving through the control lines 103 and 104 are converted to parallel data and transmitted to the internal data bus in this form. The pseudorandom signal generator 13 generates a pseudorandom 511 bit sequence according to CCITT V.52 recommendation and checks the received response signals. The distortion meter 14 measures the isochronous and one-sided distortions of the received data and transmits the measurement result via the parallel interface 12 to the internal data bus. Through the address lines of the diagnostic bus 24, the maximum number of addressable data communication devices 22 is thirty-two, but for addressing purposes the data communication devices 22 can be classified into different subgroups. The control lines allow setting the appropriate mode and controlling the interface signals of the data communication device 22, including switching to the line, transmitting request, remote loop request, rate selection, and selecting the appropriate state when reading multiple wire states. This also includes the transmission of various status data, which in this case is transmitted through eight status lines. The logical values and conditions of these wires are typical of the data transmission device 22 under consideration and of the remote processing connection through it.

By means of the system arrangement of the present invention, any particular data transmission equipment 22a to 22n of the grouped data transmission device 20 can be inspected at any time without disrupting the physical connection.

The selection is preferably made through the console display 23. It follows that the status of any data transmission equipment belonging to the system can be queried at any time and, if necessary, recorded on a mass storage device. It is also possible to observe or simulate line algorithms on any data transmission equipment.

The use of the test / monitor mode enables both computer-controlled (on-line) and stand-alone operation.

It can best be seen in Figure 1 that the diagnostic unit 30, together with the associated data transmission equipment 22a to 22n, forms a separate system engineering unit, with each data transmission unit forming a completely independent unit (from the computer 21) for the remote data processing multiplexer. It is possible to establish a communication link between the computer 21 and the diagnostic unit 30, which is a prerequisite for a good fit in the computer environment.

Although the present invention is particularly advantageous when using a tcbb data transmission device, the diagnostic functions do not change when only a single data transmission device 22 is used. In this case, the units illustrated in Figure 5 2 can be substantially simplified and formed in the diagnostic unit 30.

Claims (4)

A diagnostic arrangement for testing and monitoring a data transmission device comprising a console display (23) a pseudorandom signal generator (13), a distortion meter (14), a baud-rate generator (9), a real-time clock generator 15 (O and their associated interface circuits and interlaces, characterized in that the status bus between the modem circuits (35) of the data transmission device (22) and the remote processing control computer (21) and the control bus lines are multiplexed (32)). connected to a microprocessor-controlled diagnostic unit (30), the diagnostic unit (20) comprises a control unit (A) in which the central unit (1), a bi-directional system controller (5), read-only memory ( 2), memo25 ni ( 3), a clock (7) and a menus bus coupling circuit (4) connected to an internal bus and an interrupt controller (6) connected thereto, the internal bus being connected by lines to the console display signal (23) and the computer (21), and data transmission equipment The diagnostic bus (24) toward 30 (2 2) is connected via a parallel interface to the internal bus, and the pseudorandom signal generator (13) and distortion meter (14) are connected to the internal bus and the baud rate generator (9) is connected. ), one of its outputs, the other output of which is connected to a distortion meter (14) and connected to a pseudorandom signal generator (13) with a real-time clock generator (8), and a control input for selecting multiplexer (32) from internal bus controlled test / monitor modes it is. An embodiment of the apparatus of claim 1, characterized in that it has a plurality of data transmission apparatuses (22a ... 22n), each of which comprises a multiplier (32) having a control input on an address recognition circuit connected to the diagnostic bus (24). (31) Connected via the test / monitor cable, it also includes a bus driver (33) enabled by the address recognition circuit (31), which connects the lines formed between the computer (21) and the modem circuits (35) to the diagnostic bus (24).