HK66095A - Cache subsystem for microprocessor based computer with asynchronous and synchronous datapath - Google Patents

Cache subsystem for microprocessor based computer with asynchronous and synchronous datapath

Info

Publication number
HK66095A
HK66095A HK66095A HK66095A HK66095A HK 66095 A HK66095 A HK 66095A HK 66095 A HK66095 A HK 66095A HK 66095 A HK66095 A HK 66095A HK 66095 A HK66095 A HK 66095A
Authority
HK
Hong Kong
Prior art keywords
asynchronous
based computer
microprocessor based
cache subsystem
datapath
Prior art date
Application number
HK66095A
Other languages
English (en)
Inventor
Peter Dalton Macwilliams
Clair C Webb
Robert L Farrell
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of HK66095A publication Critical patent/HK66095A/xx

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0864Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using pseudo-associative means, e.g. set-associative or hashing
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0804Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with main memory updating
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815Cache consistency protocols
    • G06F12/0831Cache consistency protocols using a bus scheme, e.g. with bus monitoring or watching means
    • G06F12/0835Cache consistency protocols using a bus scheme, e.g. with bus monitoring or watching means for main memory peripheral accesses (e.g. I/O or DMA)
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0893Caches characterised by their organisation or structure
    • G06F12/0897Caches characterised by their organisation or structure with two or more cache hierarchy levels
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60Details of cache memory
    • G06F2212/608Details relating to cache mapping
    • G06F2212/6082Way prediction in set-associative cache

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
HK66095A 1991-06-04 1995-05-04 Cache subsystem for microprocessor based computer with asynchronous and synchronous datapath HK66095A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/710,079 US5293603A (en) 1991-06-04 1991-06-04 Cache subsystem for microprocessor based computer system with synchronous and asynchronous data path
PCT/US1992/004744 WO1992022035A1 (en) 1991-06-04 1992-06-04 Cache subsystem for microprocessor based computer with asynchronous and synchronous data path

Publications (1)

Publication Number Publication Date
HK66095A true HK66095A (en) 1995-05-12

Family

ID=24852543

Family Applications (1)

Application Number Title Priority Date Filing Date
HK66095A HK66095A (en) 1991-06-04 1995-05-04 Cache subsystem for microprocessor based computer with asynchronous and synchronous datapath

Country Status (6)

Country Link
US (1) US5293603A (de)
JP (1) JPH06508457A (de)
DE (2) DE4291778T1 (de)
GB (1) GB2272313B (de)
HK (1) HK66095A (de)
WO (1) WO1992022035A1 (de)

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Also Published As

Publication number Publication date
US5293603A (en) 1994-03-08
GB9321174D0 (en) 1994-03-16
GB2272313A (en) 1994-05-11
DE4291778B4 (de) 2005-02-10
DE4291778T1 (de) 1995-07-20
JPH06508457A (ja) 1994-09-22
WO1992022035A1 (en) 1992-12-10
GB2272313B (en) 1994-11-30

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Legal Events

Date Code Title Description
PF Patent in force
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20100604