HK18592A - Bit line equalization in a memory - Google Patents

Bit line equalization in a memory

Info

Publication number
HK18592A
HK18592A HK185/92A HK18592A HK18592A HK 18592 A HK18592 A HK 18592A HK 185/92 A HK185/92 A HK 185/92A HK 18592 A HK18592 A HK 18592A HK 18592 A HK18592 A HK 18592A
Authority
HK
Hong Kong
Prior art keywords
memory
bit line
line equalization
equalization
bit
Prior art date
Application number
HK185/92A
Other languages
English (en)
Inventor
Karl L Wang
Mark D Bader
Peter H Voss
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of HK18592A publication Critical patent/HK18592A/xx

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/419—Read-write [R-W] circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
HK185/92A 1986-03-03 1992-03-05 Bit line equalization in a memory HK18592A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/835,681 US4751680A (en) 1986-03-03 1986-03-03 Bit line equalization in a memory

Publications (1)

Publication Number Publication Date
HK18592A true HK18592A (en) 1992-03-13

Family

ID=25270188

Family Applications (1)

Application Number Title Priority Date Filing Date
HK185/92A HK18592A (en) 1986-03-03 1992-03-05 Bit line equalization in a memory

Country Status (5)

Country Link
US (1) US4751680A (ja)
JP (1) JPS62212996A (ja)
GB (1) GB2187351B (ja)
HK (1) HK18592A (ja)
SG (1) SG4692G (ja)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62170097A (ja) * 1986-01-21 1987-07-27 Fujitsu Ltd 半導体記憶装置
US4926383A (en) * 1988-02-02 1990-05-15 National Semiconductor Corporation BiCMOS write-recovery circuit
KR910003605B1 (ko) * 1988-04-30 1991-06-07 삼성전자 주식회사 Sram 센스앰프의 등화회로
US4953130A (en) * 1988-06-27 1990-08-28 Texas Instruments, Incorporated Memory circuit with extended valid data output time
JP2805761B2 (ja) * 1988-08-29 1998-09-30 日本電気株式会社 スタティックメモリ
GB2226725A (en) * 1988-12-14 1990-07-04 Philips Nv Pulse generator circuit arrangement
US5193076A (en) * 1988-12-22 1993-03-09 Texas Instruments Incorporated Control of sense amplifier latch timing
US5043945A (en) * 1989-09-05 1991-08-27 Motorola, Inc. Memory with improved bit line and write data line equalization
KR930006622B1 (ko) * 1990-09-04 1993-07-21 삼성전자 주식회사 반도체 메모리장치
KR940001644B1 (ko) * 1991-05-24 1994-02-28 삼성전자 주식회사 메모리 장치의 입출력 라인 프리차아지 방법
US5355343A (en) * 1992-09-23 1994-10-11 Shu Lee Lean Static random access memory with self timed bit line equalization
GB2277390B (en) * 1993-04-21 1997-02-26 Plessey Semiconductors Ltd Random access memory
JP3290315B2 (ja) * 1994-11-15 2002-06-10 三菱電機株式会社 半導体記憶装置
JPH09265778A (ja) * 1996-03-29 1997-10-07 Oki Micro Design Miyazaki:Kk シンクロナスｄｒａｍ
DE69630678T2 (de) * 1996-05-13 2004-09-23 Stmicroelectronics S.R.L., Agrate Brianza Spaltenmultiplexer
CN1202530C (zh) * 1998-04-01 2005-05-18 三菱电机株式会社 在低电源电压下高速动作的静态型半导体存储装置
US6101133A (en) * 1999-06-30 2000-08-08 Integrated Silicon Solution, Inc. Apparatus and method for preventing accidental writes from occurring due to simultaneous address and write enable transitions

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4355377A (en) * 1980-06-30 1982-10-19 Inmos Corporation Asynchronously equillibrated and pre-charged static ram
JPS58121195A (ja) * 1982-01-13 1983-07-19 Nec Corp プリチヤ−ジ信号発生回路
JPS59116986A (ja) * 1982-12-23 1984-07-06 Toshiba Corp 半導体記憶装置

Also Published As

Publication number Publication date
GB8704694D0 (en) 1987-04-01
JPS62212996A (ja) 1987-09-18
GB2187351A (en) 1987-09-03
US4751680A (en) 1988-06-14
GB2187351B (en) 1989-11-22
SG4692G (en) 1992-03-20

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Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)