HK1203240A1 - Memory controller, data storage device and memory control method - Google Patents

Memory controller, data storage device and memory control method

Info

Publication number
HK1203240A1
HK1203240A1 HK15103794.5A HK15103794A HK1203240A1 HK 1203240 A1 HK1203240 A1 HK 1203240A1 HK 15103794 A HK15103794 A HK 15103794A HK 1203240 A1 HK1203240 A1 HK 1203240A1
Authority
HK
Hong Kong
Prior art keywords
storage device
data storage
control method
memory
memory controller
Prior art date
Application number
HK15103794.5A
Other languages
English (en)
Chinese (zh)
Inventor
Ken Takeuchi
Kousuke Miyaji
Koh Johguchi
Hiroki Fujii
Original Assignee
Univ Tokyo
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Univ Tokyo filed Critical Univ Tokyo
Publication of HK1203240A1 publication Critical patent/HK1203240A1/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0638—Combination of memories, e.g. ROM and RAM such as to permit replacement or supplementing of words in one module by words in another module
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/005—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor comprising combined but independently operative RAM-ROM, RAM-PROM, RAM-EPROM cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0035—Evaluating degradation, retention or wearout, e.g. by counting writing cycles
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7201—Logical to physical mapping or translation of blocks or pages

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System (AREA)
HK15103794.5A 2012-02-15 2015-04-20 Memory controller, data storage device and memory control method HK1203240A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2012030798A JP5971547B2 (ja) 2012-02-15 2012-02-15 メモリコントローラ，データ記憶装置およびメモリの制御方法
PCT/JP2012/058586 WO2013121596A1 (ja) 2012-02-15 2012-03-30 メモリコントローラ，データ記憶装置およびメモリの制御方法

Publications (1)

Publication Number Publication Date
HK1203240A1 true HK1203240A1 (en) 2015-10-23

Family

ID=48983747

Family Applications (1)

Application Number Title Priority Date Filing Date
HK15103794.5A HK1203240A1 (en) 2012-02-15 2015-04-20 Memory controller, data storage device and memory control method

Country Status (6)

Country Link
US (1) US9977733B2 (xx)
JP (1) JP5971547B2 (xx)
KR (1) KR101904270B1 (xx)
CN (1) CN104115131B (xx)
HK (1) HK1203240A1 (xx)
WO (1) WO2013121596A1 (xx)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5995071B2 (ja) * 2012-09-19 2016-09-21 学校法人 中央大学 メモリコントローラ，データ記憶装置およびメモリの制御方法
KR102126760B1 (ko) 2014-04-07 2020-06-25 삼성전자 주식회사 비휘발성 메모리 장치의 구동 방법
JP6327994B2 (ja) * 2014-07-28 2018-05-23 ルネサスエレクトロニクス株式会社 制御システムおよび半導体装置
CN106293503B9 (zh) * 2015-06-23 2019-06-28 株式会社东芝 磁盘装置及控制方法
US10276227B2 (en) * 2017-04-28 2019-04-30 Taiwan Semiconductor Manufacturing Company Limited Write algorithm for memory to reduce failure rate of write operations
US20190038040A1 (en) * 2017-08-04 2019-02-07 Technogel Italia S.r.I. Mattress for improved sleep and methods of use thereof
US10809942B2 (en) * 2018-03-21 2020-10-20 Micron Technology, Inc. Latency-based storage in a hybrid memory system
US10705963B2 (en) 2018-03-21 2020-07-07 Micron Technology, Inc. Latency-based storage in a hybrid memory system
US10705747B2 (en) * 2018-03-21 2020-07-07 Micron Technology, Inc. Latency-based storage in a hybrid memory system
TWI742961B (zh) * 2020-12-10 2021-10-11 旺宏電子股份有限公司 快閃記憶體系統及其快閃記憶體裝置

Family Cites Families (20)

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US20080071973A1 (en) * 2000-01-06 2008-03-20 Chow David Q Electronic data flash card with various flash memory cells
US6836432B1 (en) * 2002-02-11 2004-12-28 Advanced Micro Devices, Inc. Partial page programming of multi level flash
JP2006018591A (ja) 2004-07-01 2006-01-19 Matsushita Electric Ind Co Ltd メモリカード
JP4956922B2 (ja) * 2004-10-27 2012-06-20 ソニー株式会社 記憶装置
JP2008134685A (ja) 2006-11-27 2008-06-12 Konica Minolta Business Technologies Inc 不揮発メモリシステム及び不揮発メモリ制御方法
US7975109B2 (en) * 2007-05-30 2011-07-05 Schooner Information Technology, Inc. System including a fine-grained memory and a less-fine-grained memory
KR101472797B1 (ko) 2007-07-16 2014-12-15 삼성전자주식회사 데이터를 읽거나 쓰기 위한 방법 및 장치
KR101553532B1 (ko) 2008-04-17 2015-09-16 삼성전자주식회사 스토리지 장치
TWI389125B (zh) * 2008-07-18 2013-03-11 A Data Technology Co Ltd 記憶體儲存裝置及其控制方法
US8832353B2 (en) * 2009-04-07 2014-09-09 Sandisk Technologies Inc. Host stop-transmission handling
US8375162B2 (en) * 2009-06-03 2013-02-12 Ocz Technology Group Inc. Method and apparatus for reducing write cycles in NAND-based flash memory devices
CN101615145B (zh) * 2009-07-24 2011-12-07 中兴通讯股份有限公司 一种提高存储器数据缓存可靠性的方法和装置
CN101645846B (zh) * 2009-09-02 2011-10-26 中兴通讯股份有限公司 一种路由交换设备及其数据缓存的方法
TWI423024B (zh) * 2009-11-23 2014-01-11 Phison Electronics Corp 用於快閃記憶體的資料儲存方法及其控制器與儲存系統
US20110167197A1 (en) * 2010-01-05 2011-07-07 Mark Leinwander Nonvolatile Storage with Disparate Memory Types
US20110252187A1 (en) * 2010-04-07 2011-10-13 Avigdor Segal System and method for operating a non-volatile memory including a portion operating as a single-level cell memory and a portion operating as a multi-level cell memory
JP2012008651A (ja) * 2010-06-22 2012-01-12 Toshiba Corp 半導体記憶装置、その制御方法および情報処理装置
JP2012008747A (ja) * 2010-06-24 2012-01-12 Nec Corp 集積装置、メモリ割り当て方法、および、プログラム
US20130103889A1 (en) * 2011-10-25 2013-04-25 Ocz Technology Group Inc. Page-buffer management of non-volatile memory-based mass storage devices
JP5995071B2 (ja) * 2012-09-19 2016-09-21 学校法人 中央大学 メモリコントローラ，データ記憶装置およびメモリの制御方法

Also Published As

Publication number Publication date
CN104115131B (zh) 2017-07-21
KR20140122730A (ko) 2014-10-20
CN104115131A (zh) 2014-10-22
KR101904270B1 (ko) 2018-10-04
US20150006796A1 (en) 2015-01-01
WO2013121596A1 (ja) 2013-08-22
US9977733B2 (en) 2018-05-22
JP5971547B2 (ja) 2016-08-17
JP2013168015A (ja) 2013-08-29

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Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20220401