HK1084506A1 - Electronic package having a folded flexible substrate and method of manufacturing the same - Google Patents

Electronic package having a folded flexible substrate and method of manufacturing the same

Info

Publication number
HK1084506A1
HK1084506A1 HK06106657.5A HK06106657A HK1084506A1 HK 1084506 A1 HK1084506 A1 HK 1084506A1 HK 06106657 A HK06106657 A HK 06106657A HK 1084506 A1 HK1084506 A1 HK 1084506A1
Authority
HK
Hong Kong
Prior art keywords
flexible substrate
electronic package
manufacturing
same
folded flexible
Prior art date
Application number
HK06106657.5A
Other languages
English (en)
Inventor
Jose Salta Iii
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of HK1084506A1 publication Critical patent/HK1084506A1/xx

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/4985—Flexible insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5387—Flexible insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06579—TAB carriers; beam leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L25/105—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01027—Cobalt [Co]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01058—Cerium [Ce]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
  • Credit Cards Or The Like (AREA)
  • Wire Bonding (AREA)
HK06106657.5A 2003-09-22 2006-06-09 Electronic package having a folded flexible substrate and method of manufacturing the same HK1084506A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/668,508 US6972482B2 (en) 2003-09-22 2003-09-22 Electronic package having a folded flexible substrate and method of manufacturing the same
PCT/US2004/030993 WO2005031865A1 (en) 2003-09-22 2004-09-22 Electronic package having a folded flexible substrate and method of manufacturing the same

Publications (1)

Publication Number Publication Date
HK1084506A1 true HK1084506A1 (en) 2006-07-28

Family

ID=34313499

Family Applications (1)

Application Number Title Priority Date Filing Date
HK06106657.5A HK1084506A1 (en) 2003-09-22 2006-06-09 Electronic package having a folded flexible substrate and method of manufacturing the same

Country Status (10)

Country Link
US (2) US6972482B2 (de)
EP (1) EP1665379B1 (de)
JP (1) JP4503604B2 (de)
KR (1) KR100893653B1 (de)
CN (1) CN1853272B (de)
AT (1) ATE556434T1 (de)
HK (1) HK1084506A1 (de)
SG (1) SG146674A1 (de)
TW (1) TWI253162B (de)
WO (1) WO2005031865A1 (de)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6972482B2 (en) 2003-09-22 2005-12-06 Intel Corporation Electronic package having a folded flexible substrate and method of manufacturing the same
US20060223227A1 (en) * 2005-04-04 2006-10-05 Tessera, Inc. Molding method for foldover package
US7767543B2 (en) * 2005-09-06 2010-08-03 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing a micro-electro-mechanical device with a folded substrate
CN100459123C (zh) * 2005-09-08 2009-02-04 南茂科技股份有限公司 堆叠型芯片封装结构、芯片封装体及其制造方法
US7985623B2 (en) * 2006-04-14 2011-07-26 Stats Chippac Ltd. Integrated circuit package system with contoured encapsulation
US8232628B2 (en) * 2008-01-22 2012-07-31 Nxp B.V. Method for manufacturing a microelectronic package comprising at least one microelectronic device
JP5269532B2 (ja) * 2008-09-22 2013-08-21 オリンパスメディカルシステムズ株式会社 カプセル型医療装置
EP2353179A4 (de) * 2008-10-17 2012-10-03 Occam Portfolio Llc Flexible schaltbaugruppen ohne lötung und herstellungsverfahren dafür
CN102186398B (zh) * 2008-12-09 2013-11-27 奥林巴斯医疗株式会社 胶囊型医疗装置及其制造方法
US8217507B1 (en) * 2010-01-22 2012-07-10 Amkor Technology, Inc. Edge mount semiconductor package
CN103523739A (zh) * 2013-11-05 2014-01-22 华进半导体封装先导技术研发中心有限公司 环境mems传感器三维柔性基板封装结构及制作方法
CN104637886B (zh) * 2013-11-12 2017-09-22 财团法人工业技术研究院 折叠式封装结构
KR102334240B1 (ko) * 2015-07-31 2021-12-01 엘지디스플레이 주식회사 폴더블 유기발광표시장치
DE102015219190A1 (de) * 2015-10-05 2017-04-06 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verfahren zum Herstellen eines elektronischen Bauelements und elektronisches Bauelement
WO2017111903A1 (en) * 2015-12-21 2017-06-29 Intel Corporation Integrating system in package (sip) with input/output (io) board for platform miniaturization
US11437696B2 (en) 2017-09-12 2022-09-06 Knowles Cazenovia, Inc. RF devices and methods thereof involving a vertical switched filter bank

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06101493B2 (ja) * 1986-03-28 1994-12-12 松下電器産業株式会社 プラスチツクチツプキヤリア
JPS63228654A (ja) * 1987-03-18 1988-09-22 Hitachi Ltd 電子装置およびその製造方法
US5345205A (en) * 1990-04-05 1994-09-06 General Electric Company Compact high density interconnected microwave system
US6225688B1 (en) 1997-12-11 2001-05-01 Tessera, Inc. Stacked microelectronic assembly and method therefor
US6300679B1 (en) 1998-06-01 2001-10-09 Semiconductor Components Industries, Llc Flexible substrate for packaging a semiconductor component
US6323060B1 (en) * 1999-05-05 2001-11-27 Dense-Pac Microsystems, Inc. Stackable flex circuit IC package and method of making same
US6351029B1 (en) 1999-05-05 2002-02-26 Harlan R. Isaak Stackable flex circuit chip package and method of making same
JP2001217388A (ja) * 2000-02-01 2001-08-10 Sony Corp 電子装置およびその製造方法
US6627984B2 (en) 2001-07-24 2003-09-30 Dense-Pac Microsystems, Inc. Chip stack with differing chip package types
WO2004017399A1 (en) 2002-08-16 2004-02-26 Tessera, Inc. Microelectronic packages with self-aligning features
US6972482B2 (en) 2003-09-22 2005-12-06 Intel Corporation Electronic package having a folded flexible substrate and method of manufacturing the same

Also Published As

Publication number Publication date
US7148087B2 (en) 2006-12-12
WO2005031865A1 (en) 2005-04-07
KR20060054466A (ko) 2006-05-22
JP4503604B2 (ja) 2010-07-14
TW200512922A (en) 2005-04-01
JP2007506285A (ja) 2007-03-15
CN1853272A (zh) 2006-10-25
EP1665379A1 (de) 2006-06-07
KR100893653B1 (ko) 2009-04-17
US6972482B2 (en) 2005-12-06
US20060008949A1 (en) 2006-01-12
EP1665379B1 (de) 2012-05-02
CN1853272B (zh) 2010-11-17
SG146674A1 (en) 2008-10-30
US20050062141A1 (en) 2005-03-24
TWI253162B (en) 2006-04-11
ATE556434T1 (de) 2012-05-15

Similar Documents

Publication Publication Date Title
HK1084506A1 (en) Electronic package having a folded flexible substrate and method of manufacturing the same
MY159064A (en) Semiconductor die package and method for making the same
WO2007022249A3 (en) Packaged microphone with electrically coupled lid
MX2007000213A (es) Componente decorativo para articulo absorbente.
WO2006076101A3 (en) A method to manufacture a universal footprint for a package with exposed chip
WO2009114392A3 (en) Semiconductor die package including embedded flip chip
AU2003233017A1 (en) Wireless communication device consisting of a grounded antenna that is coupled to a wireless communication chip as well as method for fabrication of the device
WO2007075727A3 (en) Microelectronic packages and methods therefor
TW200741902A (en) Semiconductor package and, chip carrier thereof and method for fabricating the same
WO2009086289A3 (en) Solar cell package for solar concentrator
WO2007081546A3 (en) Clipless and wireless semiconductor die package and method for making the same
TW200625529A (en) Contact hole structures and contact structures and fabrication methods thereof
EP1743868A3 (de) Eingekapselte Halbleiteranordnung mit einer inorganischen Verbindungsschicht und Verfahren zur Herstellung der Halbleiteranordnung
TW200717896A (en) Light-emitting device and method of manufacturing light-emitting device
WO2007016115A3 (en) 6,13-bis(thienyl)pentacene compounds
WO2006081427A3 (en) Apparatus having a photonic crystal
TW200719468A (en) Package, package module and manufacturing method of the package
TW200702132A (en) A keypad for cellular phone and method of the same
TW200746456A (en) Nitride-based semiconductor device and production method thereof
WO2011009677A3 (de) Optoelektronisches bauteil und verfahren zur herstellung eines optischen elements für ein optoelektronisches bauteil
AU2003299284A1 (en) Method for the production of a semiconductor component
TW200735271A (en) Semiconductor device fabrication method
TW200731426A (en) Method of fabricating an exposed die package
WO2003073482A3 (en) Process for forming isolated integrated inductive circuits
MY136216A (en) Method of forming a leadframe for a semiconductor package

Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20170922