HK1057108A1 - A microprocessor having a multiply operation - Google Patents

A microprocessor having a multiply operation

Info

Publication number
HK1057108A1
HK1057108A1 HK03107535A HK03107535A HK1057108A1 HK 1057108 A1 HK1057108 A1 HK 1057108A1 HK 03107535 A HK03107535 A HK 03107535A HK 03107535 A HK03107535 A HK 03107535A HK 1057108 A1 HK1057108 A1 HK 1057108A1
Authority
HK
Hong Kong
Prior art keywords
microprocessor
multiply operation
multiply
Prior art date
Application number
HK03107535A
Other languages
English (en)
Inventor
Alexander Peleg
Yaakov Yaari
Millind Mittal
Larry M Mennemeier
Benny Eitan
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of HK1057108A1 publication Critical patent/HK1057108A1/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/53—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G06F9/30014—Arithmetic instructions with variable precision
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30025—Format conversion instructions, e.g. Floating-Point to Integer, decimal conversion
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804—Details
    • G06F2207/3808—Details concerning the type of numbers or the way they are handled
    • G06F2207/3828—Multigauge devices, i.e. capable of handling packed numbers without unpacking them
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49905—Exception handling
    • G06F7/4991—Overflow or underflow
    • G06F7/49921—Saturation, i.e. clipping the result to a minimum or maximum value

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Computing Systems (AREA)
  • Executing Machine-Instructions (AREA)
  • Image Processing (AREA)
  • Multi Processors (AREA)
HK03107535A 1994-12-01 1998-03-16 A microprocessor having a multiply operation HK1057108A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US34955994A 1994-12-01 1994-12-01
HK98102178A HK1003189A1 (en) 1994-12-01 1998-03-16 A microprocessor having a multiply operation

Publications (1)

Publication Number Publication Date
HK1057108A1 true HK1057108A1 (en) 2004-03-12

Family

ID=23372917

Family Applications (2)

Application Number Title Priority Date Filing Date
HK03107535A HK1057108A1 (en) 1994-12-01 1998-03-16 A microprocessor having a multiply operation
HK98102178A HK1003189A1 (en) 1994-12-01 1998-03-16 A microprocessor having a multiply operation

Family Applications After (1)

Application Number Title Priority Date Filing Date
HK98102178A HK1003189A1 (en) 1994-12-01 1998-03-16 A microprocessor having a multiply operation

Country Status (7)

Country Link
US (2) US5677862A (zh)
EP (2) EP1302848B1 (zh)
JP (1) JPH11500547A (zh)
AU (1) AU4738396A (zh)
HK (2) HK1057108A1 (zh)
TW (1) TW309605B (zh)
WO (1) WO1996017293A1 (zh)

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US5936872A (en) * 1995-09-05 1999-08-10 Intel Corporation Method and apparatus for storing complex numbers to allow for efficient complex multiplication operations and performing such complex multiplication operations
US6058408A (en) * 1995-09-05 2000-05-02 Intel Corporation Method and apparatus for multiplying and accumulating complex numbers in a digital filter
US6237016B1 (en) 1995-09-05 2001-05-22 Intel Corporation Method and apparatus for multiplying and accumulating data samples and complex coefficients
US6470370B2 (en) 1995-09-05 2002-10-22 Intel Corporation Method and apparatus for multiplying and accumulating complex numbers in a digital filter
US5983253A (en) * 1995-09-05 1999-11-09 Intel Corporation Computer system for performing complex digital filters
US5701508A (en) 1995-12-19 1997-12-23 Intel Corporation Executing different instructions that cause different data type operations to be performed on single logical register file
US6792523B1 (en) 1995-12-19 2004-09-14 Intel Corporation Processor with instructions that operate on different data types stored in the same single logical register file
US5940859A (en) * 1995-12-19 1999-08-17 Intel Corporation Emptying packed data state during execution of packed data instructions
US6490607B1 (en) * 1998-01-28 2002-12-03 Advanced Micro Devices, Inc. Shared FP and SIMD 3D multiplier
US6418529B1 (en) * 1998-03-31 2002-07-09 Intel Corporation Apparatus and method for performing intra-add operation
US7395302B2 (en) 1998-03-31 2008-07-01 Intel Corporation Method and apparatus for performing horizontal addition and subtraction
US6211892B1 (en) * 1998-03-31 2001-04-03 Intel Corporation System and method for performing an intra-add operation
US7392275B2 (en) * 1998-03-31 2008-06-24 Intel Corporation Method and apparatus for performing efficient transformations with horizontal addition and subtraction
US6098087A (en) * 1998-04-23 2000-08-01 Infineon Technologies North America Corp. Method and apparatus for performing shift operations on packed data
US7932911B2 (en) * 1998-08-24 2011-04-26 Microunity Systems Engineering, Inc. Processor for executing switch and translate instructions requiring wide operands
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US6272512B1 (en) 1998-10-12 2001-08-07 Intel Corporation Data manipulation instruction for enhancing value and efficiency of complex arithmetic
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EP2267596B1 (en) * 1999-05-12 2018-08-15 Analog Devices, Inc. Processor core for processing instructions of different formats
US6546480B1 (en) * 1999-10-01 2003-04-08 Hitachi, Ltd. Instructions for arithmetic operations on vectored data
AU2001281162A1 (en) * 2000-08-16 2002-02-25 Sun Microsystems, Inc. General purpose processor with graphics/media support
US7127593B2 (en) * 2001-06-11 2006-10-24 Broadcom Corporation Conditional execution with multiple destination stores
US6813627B2 (en) * 2001-07-31 2004-11-02 Hewlett-Packard Development Company, L.P. Method and apparatus for performing integer multiply operations using primitive multi-media operations that operate on smaller operands
GB2389678A (en) * 2002-06-14 2003-12-17 Univ Sheffield Finite field processor reconfigurable for varying sizes of field.
US7668897B2 (en) 2003-06-16 2010-02-23 Arm Limited Result partitioning within SIMD data processing systems
US7424501B2 (en) 2003-06-30 2008-09-09 Intel Corporation Nonlinear filtering and deblocking applications utilizing SIMD sign and absolute value operations
US7689641B2 (en) 2003-06-30 2010-03-30 Intel Corporation SIMD integer multiply high with round and shift
GB2409062C (en) * 2003-12-09 2007-12-11 Advanced Risc Mach Ltd Aliasing data processing registers
US7433912B1 (en) 2004-02-19 2008-10-07 Sun Microsystems, Inc. Multiplier structure supporting different precision multiplication operations
US7672989B2 (en) * 2005-05-09 2010-03-02 Sandisk Il Ltd. Large number multiplication method and device
EP2798464B8 (en) 2011-12-30 2019-12-11 Intel Corporation Packed rotate processors, methods, systems, and instructions
US9785565B2 (en) 2014-06-30 2017-10-10 Microunity Systems Engineering, Inc. System and methods for expandably wide processor instructions
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US20160188327A1 (en) * 2014-12-24 2016-06-30 Elmoustapha Ould-Ahmed-Vall Apparatus and method for fused multiply-multiply instructions
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Also Published As

Publication number Publication date
US5677862A (en) 1997-10-14
JPH11500547A (ja) 1999-01-12
EP0795155A1 (en) 1997-09-17
HK1003189A1 (en) 1998-10-16
AU4738396A (en) 1996-06-19
WO1996017293A1 (en) 1996-06-06
TW309605B (zh) 1997-07-01
US5675526A (en) 1997-10-07
EP1302848A3 (en) 2003-05-14
EP0795155B1 (en) 2003-03-19
EP1302848A2 (en) 2003-04-16
EP0795155A4 (en) 1999-08-11
EP1302848B1 (en) 2006-11-02

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Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20121201