HK1044639A1 - Method and apparatus for controlling compensated buffers. - Google Patents

Method and apparatus for controlling compensated buffers.

Info

Publication number
HK1044639A1
HK1044639A1 HK02106237A HK02106237A HK1044639A1 HK 1044639 A1 HK1044639 A1 HK 1044639A1 HK 02106237 A HK02106237 A HK 02106237A HK 02106237 A HK02106237 A HK 02106237A HK 1044639 A1 HK1044639 A1 HK 1044639A1
Authority
HK
Hong Kong
Prior art keywords
controlling
compensated
buffers
compensated buffers
controlling compensated
Prior art date
Application number
HK02106237A
Other languages
English (en)
Inventor
Brian Possley
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of HK1044639A1 publication Critical patent/HK1044639A1/xx

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00369—Modifications for compensating variations of temperature, supply voltage or other physical parameters
    • H03K19/00384—Modifications for compensating variations of temperature, supply voltage or other physical parameters in field effect transistor circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)
  • Record Information Processing For Printing (AREA)
  • Developing Agents For Electrophotography (AREA)
  • Non-Silver Salt Photosensitive Materials And Non-Silver Salt Photography (AREA)
HK02106237A 1999-10-15 2002-08-23 Method and apparatus for controlling compensated buffers. HK1044639A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/418,762 US6300798B1 (en) 1999-10-15 1999-10-15 Method and apparatus for controlling compensated buffers
PCT/US2000/026547 WO2001029967A1 (en) 1999-10-15 2000-09-27 Method and apparatus for controlling compensated buffers

Publications (1)

Publication Number Publication Date
HK1044639A1 true HK1044639A1 (en) 2002-10-25

Family

ID=23659472

Family Applications (1)

Application Number Title Priority Date Filing Date
HK02106237A HK1044639A1 (en) 1999-10-15 2002-08-23 Method and apparatus for controlling compensated buffers.

Country Status (9)

Country Link
US (1) US6300798B1 (xx)
JP (1) JP2003512753A (xx)
KR (1) KR100563106B1 (xx)
AU (1) AU7722200A (xx)
DE (1) DE10085097B4 (xx)
GB (1) GB2371694B (xx)
HK (1) HK1044639A1 (xx)
TW (1) TW517454B (xx)
WO (1) WO2001029967A1 (xx)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6545522B2 (en) * 2001-05-17 2003-04-08 Intel Corporation Apparatus and method to provide a single reference component for multiple circuit compensation using digital impedance code shifting
US6535047B2 (en) 2001-05-17 2003-03-18 Intel Corporation Apparatus and method to use a single reference component in a master-slave configuration for multiple circuit compensation
US6633178B2 (en) * 2001-09-28 2003-10-14 Intel Corporation Apparatus and method for power efficient line driver
JP4502177B2 (ja) * 2003-10-14 2010-07-14 ルネサスエレクトロニクス株式会社 出力回路
US7009894B2 (en) * 2004-02-19 2006-03-07 Intel Corporation Dynamically activated memory controller data termination

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4079456A (en) 1977-01-24 1978-03-14 Rca Corporation Output buffer synchronizing circuit having selectively variable delay means
JPH0792492B2 (ja) 1986-11-28 1995-10-09 日立電子エンジニアリング株式会社 電子デバイス駆動回路
US4975598A (en) * 1988-12-21 1990-12-04 Intel Corporation Temperature, voltage, and process compensated output driver
JPH0583111A (ja) * 1991-09-24 1993-04-02 Nec Ic Microcomput Syst Ltd Ｃｍｏｓ集積回路
US5303191A (en) * 1992-01-23 1994-04-12 Motorola, Inc. Memory with compensation for voltage, temperature, and processing variations
US5334885A (en) 1993-01-13 1994-08-02 At&T Bell Laboratories Automatic control of buffer speed
US5444406A (en) * 1993-02-08 1995-08-22 Advanced Micro Devices, Inc. Self-adjusting variable drive strength buffer circuit and method for controlling the drive strength of a buffer circuit
DE69428045T2 (de) 1993-06-08 2002-04-18 Nat Semiconductor Corp Programmierbarer cmos bus- und übertragungsleitungstreiber
JPH0722597A (ja) 1993-06-23 1995-01-24 Kawasaki Steel Corp 半導体集積回路装置
US5548201A (en) 1994-09-13 1996-08-20 Norand Corporation Battery charging method and apparatus with thermal mass equalization
DE4441523C1 (de) * 1994-11-22 1996-05-15 Itt Ind Gmbh Deutsche Digitale Treiberschaltung für eine integrierte Schaltung
US5640122A (en) * 1994-12-16 1997-06-17 Sgs-Thomson Microelectronics, Inc. Circuit for providing a bias voltage compensated for p-channel transistor variations
US5594373A (en) 1994-12-20 1997-01-14 Sgs-Thomson Microelectronics, Inc. Output driver circuitry with selective limited output high voltage
US5883801A (en) 1996-05-14 1999-03-16 Microwave Science, Llc Method and apparatus for managing electromagnetic radiation usage
US5870001A (en) 1996-10-22 1999-02-09 Telefonaktiebolaget L M Ericsson (Publ) Apparatus, and associated method, for calibrating a device
US5959481A (en) * 1997-02-18 1999-09-28 Rambus Inc. Bus driver circuit including a slew rate indicator circuit having a one shot circuit
US5898321A (en) 1997-03-24 1999-04-27 Intel Corporation Method and apparatus for slew rate and impedance compensating buffer circuits
US5869983A (en) * 1997-03-24 1999-02-09 Intel Corporation Method and apparatus for controlling compensated buffers
US6031385A (en) 1997-03-24 2000-02-29 Intel Corporation Method and apparatus for testing compensated buffer circuits
US6092030A (en) * 1997-04-02 2000-07-18 Credence Systems Corporation Timing delay generator and method including compensation for environmental variation
JPH1117516A (ja) 1997-06-10 1999-01-22 Ind Technol Res Inst 制御されたスルーレートを有する高速及び低速出力バッファー
US5912569A (en) * 1997-09-22 1999-06-15 Cypress Semiconductor Corp. Methods, circuits and devices for improving crossover performance and/or monotonicity, and applications of the same in a universal serial bus (USB) low speed output driver

Also Published As

Publication number Publication date
GB2371694B (en) 2004-07-21
US6300798B1 (en) 2001-10-09
WO2001029967A1 (en) 2001-04-26
TW517454B (en) 2003-01-11
JP2003512753A (ja) 2003-04-02
KR100563106B1 (ko) 2006-03-27
GB0210910D0 (en) 2002-06-19
KR20020060712A (ko) 2002-07-18
AU7722200A (en) 2001-04-30
GB2371694A (en) 2002-07-31
DE10085097B4 (de) 2008-12-18
DE10085097T1 (de) 2002-09-19

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Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20130927