FR2728559B1
(fr)
*
|
1994-12-23 |
1997-01-31 |
Saint Gobain Vitrage |
Substrats en verre revetus d'un empilement de couches minces a proprietes de reflexion dans l'infrarouge et/ou dans le domaine du rayonnement solaire
|
US6463522B1
(en)
*
|
1997-12-16 |
2002-10-08 |
Intel Corporation |
Memory system for ordering load and store instructions in a processor that performs multithread execution
|
US6772324B2
(en)
|
1997-12-17 |
2004-08-03 |
Intel Corporation |
Processor having multiple program counters and trace buffers outside an execution pipeline
|
JP3116901B2
(ja)
*
|
1998-04-28 |
2000-12-11 |
日本電気株式会社 |
プログラム検査方法、プログラム検査装置及びプログラム検査プログラムを記録した記録媒体
|
US6412067B1
(en)
|
1998-08-11 |
2002-06-25 |
Intel Corporation |
Backing out of a processor architectural state
|
US6463580B1
(en)
*
|
1998-11-18 |
2002-10-08 |
Intel Corporation |
Parallel processing utilizing highly correlated data values
|
US6738896B1
(en)
*
|
1999-02-01 |
2004-05-18 |
Hewlett-Packard Development Company, L.P. |
Method and apparatus for determining availability of a queue which allows random insertion
|
US6704856B1
(en)
*
|
1999-02-01 |
2004-03-09 |
Hewlett-Packard Development Company, L.P. |
Method for compacting an instruction queue
|
US6353881B1
(en)
*
|
1999-05-17 |
2002-03-05 |
Sun Microsystems, Inc. |
Supporting space-time dimensional program execution by selectively versioning memory updates
|
US6463526B1
(en)
*
|
1999-06-07 |
2002-10-08 |
Sun Microsystems, Inc. |
Supporting multi-dimensional space-time computing through object versioning
|
US6640315B1
(en)
*
|
1999-06-26 |
2003-10-28 |
Board Of Trustees Of The University Of Illinois |
Method and apparatus for enhancing instruction level parallelism
|
US6889319B1
(en)
*
|
1999-12-09 |
2005-05-03 |
Intel Corporation |
Method and apparatus for entering and exiting multiple threads within a multithreaded processor
|
US7051329B1
(en)
*
|
1999-12-28 |
2006-05-23 |
Intel Corporation |
Method and apparatus for managing resources in a multithreaded processor
|
US6484254B1
(en)
*
|
1999-12-30 |
2002-11-19 |
Intel Corporation |
Method, apparatus, and system for maintaining processor ordering by checking load addresses of unretired load instructions against snooping store addresses
|
US6438673B1
(en)
*
|
1999-12-30 |
2002-08-20 |
Intel Corporation |
Correlated address prediction
|
DE10000960C1
(de)
*
|
2000-01-12 |
2001-12-20 |
Infineon Technologies Ag |
Datenverarbeitungsvorrichtung
|
US6609247B1
(en)
*
|
2000-02-18 |
2003-08-19 |
Hewlett-Packard Development Company |
Method and apparatus for re-creating the trace of an emulated instruction set when executed on hardware native to a different instruction set field
|
US7856633B1
(en)
|
2000-03-24 |
2010-12-21 |
Intel Corporation |
LRU cache replacement for a partitioned set associative cache
|
US6823446B1
(en)
*
|
2000-04-13 |
2004-11-23 |
International Business Machines Corporation |
Apparatus and method for performing branch predictions using dual branch history tables and for updating such branch history tables
|
US7363633B1
(en)
*
|
2000-04-24 |
2008-04-22 |
Microsoft Corporation |
Registering and storing dependencies among applications and objects in a computer system and communicating the dependencies to a recovery or backup service
|
US7847803B1
(en)
*
|
2000-07-26 |
2010-12-07 |
Ati Technologies Ulc |
Method and apparatus for interleaved graphics processing
|
US6907520B2
(en)
*
|
2001-01-11 |
2005-06-14 |
Sun Microsystems, Inc. |
Threshold-based load address prediction and new thread identification in a multithreaded microprocessor
|
US20020099759A1
(en)
*
|
2001-01-24 |
2002-07-25 |
Gootherts Paul David |
Load balancer with starvation avoidance
|
US6968447B1
(en)
|
2001-04-13 |
2005-11-22 |
The United States Of America As Represented By The Secretary Of The Navy |
System and method for data forwarding in a programmable multiple network processor environment
|
US6950927B1
(en)
*
|
2001-04-13 |
2005-09-27 |
The United States Of America As Represented By The Secretary Of The Navy |
System and method for instruction-level parallelism in a programmable multiple network processor environment
|
US7320065B2
(en)
|
2001-04-26 |
2008-01-15 |
Eleven Engineering Incorporated |
Multithread embedded processor with input/output capability
|
US7356673B2
(en)
*
|
2001-04-30 |
2008-04-08 |
International Business Machines Corporation |
System and method including distributed instruction buffers for storing frequently executed instructions in predecoded form
|
WO2003044688A2
(en)
*
|
2001-11-19 |
2003-05-30 |
Igor Anatolievich Abrosimov |
Latency tolerant processing equipment
|
US7069424B2
(en)
*
|
2002-01-02 |
2006-06-27 |
Intel Corporation |
Placing front instruction in replay loop to front to place side instruction into execution stream upon determination of criticality
|
GB0209670D0
(en)
*
|
2002-04-26 |
2002-06-05 |
Easics Nv |
Efficient packet processing pipelining device and method
|
WO2003102758A1
(en)
*
|
2002-05-31 |
2003-12-11 |
University Of Delaware |
Method and apparatus for real-time multithreading
|
US7010665B1
(en)
|
2002-06-27 |
2006-03-07 |
Intel Corporation |
Method and apparatus for decompressing relative addresses
|
US7111148B1
(en)
|
2002-06-27 |
2006-09-19 |
Intel Corporation |
Method and apparatus for compressing relative addresses
|
US7103751B1
(en)
|
2002-06-27 |
2006-09-05 |
Intel Corporation |
Method and apparatus for representation of an address in canonical form
|
US7941651B1
(en)
|
2002-06-27 |
2011-05-10 |
Intel Corporation |
Method and apparatus for combining micro-operations to process immediate data
|
US7298740B2
(en)
*
|
2002-07-11 |
2007-11-20 |
Sprint Communications Company L.P. |
Centralized service control for a telecommunication system
|
US20040064685A1
(en)
*
|
2002-09-27 |
2004-04-01 |
Hung Nguyen |
System and method for real-time tracing and profiling of a superscalar processor implementing conditional execution
|
US7961723B2
(en)
*
|
2002-10-08 |
2011-06-14 |
Netlogic Microsystems, Inc. |
Advanced processor with mechanism for enforcing ordering between information sent on two independent networks
|
US7984268B2
(en)
*
|
2002-10-08 |
2011-07-19 |
Netlogic Microsystems, Inc. |
Advanced processor scheduling in a multithreaded system
|
US8037224B2
(en)
|
2002-10-08 |
2011-10-11 |
Netlogic Microsystems, Inc. |
Delegating network processor operations to star topology serial bus interfaces
|
US9088474B2
(en)
*
|
2002-10-08 |
2015-07-21 |
Broadcom Corporation |
Advanced processor with interfacing messaging network to a CPU
|
US8015567B2
(en)
|
2002-10-08 |
2011-09-06 |
Netlogic Microsystems, Inc. |
Advanced processor with mechanism for packet distribution at high line rate
|
US7627721B2
(en)
*
|
2002-10-08 |
2009-12-01 |
Rmi Corporation |
Advanced processor with cache coherency
|
US8176298B2
(en)
*
|
2002-10-08 |
2012-05-08 |
Netlogic Microsystems, Inc. |
Multi-core multi-threaded processing systems with instruction reordering in an in-order pipeline
|
US7924828B2
(en)
*
|
2002-10-08 |
2011-04-12 |
Netlogic Microsystems, Inc. |
Advanced processor with mechanism for fast packet queuing operations
|
US20050044324A1
(en)
*
|
2002-10-08 |
2005-02-24 |
Abbas Rashid |
Advanced processor with mechanism for maximizing resource usage in an in-order pipeline with multiple threads
|
US8478811B2
(en)
*
|
2002-10-08 |
2013-07-02 |
Netlogic Microsystems, Inc. |
Advanced processor with credit based scheme for optimal packet flow in a multi-processor system on a chip
|
US20050033889A1
(en)
*
|
2002-10-08 |
2005-02-10 |
Hass David T. |
Advanced processor with interrupt delivery mechanism for multi-threaded multi-CPU system on a chip
|
US7461215B2
(en)
*
|
2002-10-08 |
2008-12-02 |
Rmi Corporation |
Advanced processor with implementation of memory ordering on a ring based data movement network
|
US7334086B2
(en)
|
2002-10-08 |
2008-02-19 |
Rmi Corporation |
Advanced processor with system on a chip interconnect technology
|
US20050033831A1
(en)
*
|
2002-10-08 |
2005-02-10 |
Abbas Rashid |
Advanced processor with a thread aware return address stack optimally used across active threads
|
US7346757B2
(en)
|
2002-10-08 |
2008-03-18 |
Rmi Corporation |
Advanced processor translation lookaside buffer management in a multithreaded system
|
US7461213B2
(en)
|
2002-10-08 |
2008-12-02 |
Rmi Corporation |
Advanced processor system using request, data, snoop, and response rings
|
CN1519703B
(zh)
*
|
2003-01-23 |
2010-05-05 |
英业达股份有限公司 |
可组合挂接的计算机多线程测试系统及其方法
|
US20040154010A1
(en)
*
|
2003-01-31 |
2004-08-05 |
Pedro Marcuello |
Control-quasi-independent-points guided speculative multithreading
|
US7200542B1
(en)
*
|
2003-02-21 |
2007-04-03 |
Hewlett-Packard Development Company, L.P. |
Method and apparatus for biased identification of potential data sharing locations
|
US7426628B2
(en)
*
|
2003-03-14 |
2008-09-16 |
National Instruments Corporation |
Run-time node prefetch prediction in dataflow graphs
|
US7496921B2
(en)
*
|
2003-08-29 |
2009-02-24 |
Intel Corporation |
Processing block with integrated light weight multi-threading support
|
WO2005029318A2
(en)
*
|
2003-09-19 |
2005-03-31 |
University Of Delaware |
Methods and products for processing loop nests
|
US7395527B2
(en)
|
2003-09-30 |
2008-07-01 |
International Business Machines Corporation |
Method and apparatus for counting instruction execution and data accesses
|
US7133969B2
(en)
|
2003-10-01 |
2006-11-07 |
Advanced Micro Devices, Inc. |
System and method for handling exceptional instructions in a trace cache based processor
|
US8381037B2
(en)
*
|
2003-10-09 |
2013-02-19 |
International Business Machines Corporation |
Method and system for autonomic execution path selection in an application
|
US7555633B1
(en)
|
2003-11-03 |
2009-06-30 |
Advanced Micro Devices, Inc. |
Instruction cache prefetch based on trace cache eviction
|
US8069336B2
(en)
*
|
2003-12-03 |
2011-11-29 |
Globalfoundries Inc. |
Transitioning from instruction cache to trace cache on label boundaries
|
US20050138333A1
(en)
*
|
2003-12-19 |
2005-06-23 |
Samra Nicholas G. |
Thread switching mechanism
|
US7213126B1
(en)
|
2004-01-12 |
2007-05-01 |
Advanced Micro Devices, Inc. |
Method and processor including logic for storing traces within a trace cache
|
US7415705B2
(en)
|
2004-01-14 |
2008-08-19 |
International Business Machines Corporation |
Autonomic method and apparatus for hardware assist for patching code
|
US7895382B2
(en)
|
2004-01-14 |
2011-02-22 |
International Business Machines Corporation |
Method and apparatus for qualifying collection of performance monitoring events by types of interrupt when interrupt occurs
|
US7177982B2
(en)
*
|
2004-01-16 |
2007-02-13 |
International Business Machines Corporation |
Method to maintain order between multiple queues with different ordering requirements in a high frequency system
|
WO2005072307A2
(en)
*
|
2004-01-22 |
2005-08-11 |
University Of Washington |
Wavescalar architecture having a wave order memory
|
US7490218B2
(en)
*
|
2004-01-22 |
2009-02-10 |
University Of Washington |
Building a wavecache
|
US7571302B1
(en)
*
|
2004-02-04 |
2009-08-04 |
Lei Chen |
Dynamic data dependence tracking and its application to branch prediction
|
US7421684B2
(en)
*
|
2004-03-22 |
2008-09-02 |
International Business Machines Corporation |
Method and apparatus for autonomic test case feedback using hardware assistance for data coverage
|
US8135915B2
(en)
*
|
2004-03-22 |
2012-03-13 |
International Business Machines Corporation |
Method and apparatus for hardware assistance for prefetching a pointer to a data structure identified by a prefetch indicator
|
US7480899B2
(en)
|
2004-03-22 |
2009-01-20 |
International Business Machines Corporation |
Method and apparatus for autonomic test case feedback using hardware assistance for code coverage
|
US7197630B1
(en)
|
2004-04-12 |
2007-03-27 |
Advanced Micro Devices, Inc. |
Method and system for changing the executable status of an operation following a branch misprediction without refetching the operation
|
US7574439B2
(en)
*
|
2004-05-20 |
2009-08-11 |
International Business Machines Corporation |
Managing a nested request
|
US20060009265A1
(en)
*
|
2004-06-30 |
2006-01-12 |
Clapper Edward O |
Communication blackout feature
|
US7571284B1
(en)
|
2004-06-30 |
2009-08-04 |
Sun Microsystems, Inc. |
Out-of-order memory transactions in a fine-grain multithreaded/multi-core processor
|
US7543132B1
(en)
|
2004-06-30 |
2009-06-02 |
Sun Microsystems, Inc. |
Optimizing hardware TLB reload performance in a highly-threaded processor with multiple page sizes
|
US7366829B1
(en)
|
2004-06-30 |
2008-04-29 |
Sun Microsystems, Inc. |
TLB tag parity checking without CAM read
|
US7290116B1
(en)
|
2004-06-30 |
2007-10-30 |
Sun Microsystems, Inc. |
Level 2 cache index hashing to avoid hot spots
|
US7509484B1
(en)
|
2004-06-30 |
2009-03-24 |
Sun Microsystems, Inc. |
Handling cache misses by selectively flushing the pipeline
|
US7519796B1
(en)
|
2004-06-30 |
2009-04-14 |
Sun Microsystems, Inc. |
Efficient utilization of a store buffer using counters
|
US7365007B2
(en)
*
|
2004-06-30 |
2008-04-29 |
Intel Corporation |
Interconnects with direct metalization and conductive polymer
|
US8166282B2
(en)
*
|
2004-07-21 |
2012-04-24 |
Intel Corporation |
Multi-version register file for multithreading processors with live-in precomputation
|
US20060026371A1
(en)
*
|
2004-07-30 |
2006-02-02 |
Chrysos George Z |
Method and apparatus for implementing memory order models with order vectors
|
US7278058B1
(en)
*
|
2004-08-25 |
2007-10-02 |
Unisys Corporation |
Methods and apparatus to diagnose software
|
US7458065B2
(en)
*
|
2004-09-21 |
2008-11-25 |
Intel Corporation |
Selection of spawning pairs for a speculative multithreaded processor
|
US7681196B2
(en)
*
|
2004-11-18 |
2010-03-16 |
Oracle International Corporation |
Providing optimal number of threads to applications performing multi-tasking using threads
|
US8756605B2
(en)
*
|
2004-12-17 |
2014-06-17 |
Oracle America, Inc. |
Method and apparatus for scheduling multiple threads for execution in a shared microprocessor pipeline
|
US7516313B2
(en)
*
|
2004-12-29 |
2009-04-07 |
Intel Corporation |
Predicting contention in a processor
|
US7430643B2
(en)
*
|
2004-12-30 |
2008-09-30 |
Sun Microsystems, Inc. |
Multiple contexts for efficient use of translation lookaside buffer
|
US7631130B2
(en)
*
|
2005-02-04 |
2009-12-08 |
Mips Technologies, Inc |
Barrel-incrementer-based round-robin apparatus and instruction dispatch scheduler employing same for use in multithreading microprocessor
|
US7657891B2
(en)
*
|
2005-02-04 |
2010-02-02 |
Mips Technologies, Inc. |
Multithreading microprocessor with optimized thread scheduler for increasing pipeline utilization efficiency
|
US7853777B2
(en)
*
|
2005-02-04 |
2010-12-14 |
Mips Technologies, Inc. |
Instruction/skid buffers in a multithreading microprocessor that store dispatched instructions to avoid re-fetching flushed instructions
|
US7490230B2
(en)
*
|
2005-02-04 |
2009-02-10 |
Mips Technologies, Inc. |
Fetch director employing barrel-incrementer-based round-robin apparatus for use in multithreading microprocessor
|
DE102005009083B4
(de)
*
|
2005-02-28 |
2007-05-10 |
Infineon Technologies Ag |
Multithread-Prozessor mit einer Synchronisationseinheit und Verfahren zum Betreiben eines solchen
|
US7475232B2
(en)
*
|
2005-07-19 |
2009-01-06 |
International Business Machines Corporation |
Performance of an in-order processor by no longer requiring a uniform completion point across different execution pipelines
|
US8205200B2
(en)
*
|
2005-11-29 |
2012-06-19 |
Intel Corporation |
Compiler-based scheduling optimization hints for user-level threads
|
US7558946B2
(en)
*
|
2005-12-12 |
2009-07-07 |
Intel Corporation |
Breaking a lock situation in a processor without detection of the lock situation using a multi-level approach
|
US7945901B2
(en)
*
|
2006-08-16 |
2011-05-17 |
Seiko Epson Corporation |
System and method for facilitating software profiling procedures
|
US7590784B2
(en)
*
|
2006-08-31 |
2009-09-15 |
Intel Corporation |
Detecting and resolving locks in a memory unit
|
US20080077777A1
(en)
*
|
2006-09-25 |
2008-03-27 |
Arm Limited |
Register renaming for instructions having unresolved condition codes
|
US8516462B2
(en)
*
|
2006-10-09 |
2013-08-20 |
International Business Machines Corporation |
Method and apparatus for managing a stack
|
US7472260B2
(en)
*
|
2006-10-10 |
2008-12-30 |
P.A. Semi, Inc. |
Early retirement of store operation past exception reporting pipeline stage in strongly ordered processor with load/store queue entry retained until completion
|
US7590826B2
(en)
*
|
2006-11-06 |
2009-09-15 |
Arm Limited |
Speculative data value usage
|
US20080140979A1
(en)
*
|
2006-12-12 |
2008-06-12 |
Kim Sang Cheol |
Method of allocating stack in multi-threaded sensor operating system environment
|
US8578347B1
(en)
*
|
2006-12-28 |
2013-11-05 |
The Mathworks, Inc. |
Determining stack usage of generated code from a model
|
US20080163230A1
(en)
*
|
2006-12-29 |
2008-07-03 |
Fernando Latorre |
Method and apparatus for selection among multiple execution threads
|
US8291197B2
(en)
*
|
2007-02-12 |
2012-10-16 |
Oracle America, Inc. |
Aggressive loop parallelization using speculative execution mechanisms
|
US7739456B1
(en)
*
|
2007-03-06 |
2010-06-15 |
Oracle America, Inc. |
Method and apparatus for supporting very large transactions
|
US20090133022A1
(en)
*
|
2007-11-15 |
2009-05-21 |
Karim Faraydon O |
Multiprocessing apparatus, system and method
|
US9596324B2
(en)
*
|
2008-02-08 |
2017-03-14 |
Broadcom Corporation |
System and method for parsing and allocating a plurality of packets to processor core threads
|
US8589890B2
(en)
*
|
2008-06-03 |
2013-11-19 |
International Business Machines Corporation |
Mechanism for maintaining detailed trace information relevant to the current operation being processed
|
US8933953B2
(en)
|
2008-06-30 |
2015-01-13 |
Intel Corporation |
Managing active thread dependencies in graphics processing
|
US8423751B2
(en)
*
|
2009-03-04 |
2013-04-16 |
Via Technologies, Inc. |
Microprocessor with fast execution of call and return instructions
|
US20100306509A1
(en)
*
|
2009-05-29 |
2010-12-02 |
Via Technologies, Inc. |
Out-of-order execution microprocessor with reduced store collision load replay reduction
|
US8533436B2
(en)
*
|
2009-06-26 |
2013-09-10 |
Intel Corporation |
Adaptively handling remote atomic execution based upon contention prediction
|
US10698859B2
(en)
|
2009-09-18 |
2020-06-30 |
The Board Of Regents Of The University Of Texas System |
Data multicasting with router replication and target instruction identification in a distributed multi-core processing architecture
|
US8676818B2
(en)
*
|
2010-05-03 |
2014-03-18 |
International Business Machines Corporation |
Dynamic storage and retrieval of process graphs representative of business processes and extraction of formal process models therefrom
|
US8619084B2
(en)
*
|
2010-05-03 |
2013-12-31 |
International Business Machines Corporation |
Dynamic adaptive process discovery and compliance
|
KR101731742B1
(ko)
|
2010-06-18 |
2017-04-28 |
보드 오브 리전츠 더 유니버시티 오브 텍사스 시스템 |
결합된 분기 타깃 및 프레디킷 예측
|
US9104991B2
(en)
*
|
2010-07-30 |
2015-08-11 |
Bank Of America Corporation |
Predictive retirement toolset
|
US8516577B2
(en)
|
2010-09-22 |
2013-08-20 |
Intel Corporation |
Regulating atomic memory operations to prevent denial of service attack
|
US8862942B2
(en)
|
2010-12-23 |
2014-10-14 |
Intel Corporation |
Method of system for detecting abnormal interleavings in concurrent programs
|
US9612934B2
(en)
*
|
2011-10-28 |
2017-04-04 |
Cavium, Inc. |
Network processor with distributed trace buffers
|
US8935574B2
(en)
|
2011-12-16 |
2015-01-13 |
Advanced Micro Devices, Inc. |
Correlating traces in a computing system
|
US9268569B2
(en)
*
|
2012-02-24 |
2016-02-23 |
Apple Inc. |
Branch misprediction behavior suppression on zero predicate branch mispredict
|
US9606800B1
(en)
*
|
2012-03-15 |
2017-03-28 |
Marvell International Ltd. |
Method and apparatus for sharing instruction scheduling resources among a plurality of execution threads in a multi-threaded processor architecture
|
US20140201505A1
(en)
*
|
2012-03-30 |
2014-07-17 |
Matthew C. Merten |
Prediction-based thread selection in a multithreading processor
|
US8832500B2
(en)
|
2012-08-10 |
2014-09-09 |
Advanced Micro Devices, Inc. |
Multiple clock domain tracing
|
US8959398B2
(en)
|
2012-08-16 |
2015-02-17 |
Advanced Micro Devices, Inc. |
Multiple clock domain debug capability
|
US9384002B2
(en)
*
|
2012-11-16 |
2016-07-05 |
International Business Machines Corporation |
Speculative finish of instruction execution in a processor core
|
US9229896B2
(en)
|
2012-12-21 |
2016-01-05 |
Apple Inc. |
Systems and methods for maintaining an order of read and write transactions in a computing system
|
US9830224B2
(en)
*
|
2013-03-15 |
2017-11-28 |
Nvidia Corporation |
Selective fault stalling for a GPU memory pipeline in a unified virtual memory system
|
WO2015027403A1
(en)
*
|
2013-08-28 |
2015-03-05 |
Hewlett-Packard Development Company, L.P. |
Testing multi-threaded applications
|
US20150241219A1
(en)
*
|
2014-02-25 |
2015-08-27 |
Ford Global Technologies, Llc |
Method and Apparatus for Providing a Navigation Route Having Multiple Associated Points of Interest
|
US9933841B2
(en)
*
|
2014-04-17 |
2018-04-03 |
Arm Limited |
Reuse of results of back-to-back micro-operations
|
CN105094750B
(zh)
*
|
2014-04-25 |
2018-08-21 |
华为技术有限公司 |
一种多线程处理器的返回地址预测方法和装置
|
US10069767B1
(en)
*
|
2014-10-31 |
2018-09-04 |
Netronome Systems, Inc. |
Method of dynamically allocating buffers for packet data received onto a networking device
|
US9626313B2
(en)
*
|
2014-12-18 |
2017-04-18 |
Qualcomm Incorporated |
Trace buffer based replay for context switching
|
US10180841B2
(en)
|
2014-12-22 |
2019-01-15 |
Centipede Semi Ltd. |
Early termination of segment monitoring in run-time code parallelization
|
US9348595B1
(en)
|
2014-12-22 |
2016-05-24 |
Centipede Semi Ltd. |
Run-time code parallelization with continuous monitoring of repetitive instruction sequences
|
US9135015B1
(en)
|
2014-12-25 |
2015-09-15 |
Centipede Semi Ltd. |
Run-time code parallelization with monitoring of repetitive instruction sequences during branch mis-prediction
|
US9996354B2
(en)
*
|
2015-01-09 |
2018-06-12 |
International Business Machines Corporation |
Instruction stream tracing of multi-threaded processors
|
US9208066B1
(en)
*
|
2015-03-04 |
2015-12-08 |
Centipede Semi Ltd. |
Run-time code parallelization with approximate monitoring of instruction sequences
|
US10296346B2
(en)
|
2015-03-31 |
2019-05-21 |
Centipede Semi Ltd. |
Parallelized execution of instruction sequences based on pre-monitoring
|
US10296350B2
(en)
|
2015-03-31 |
2019-05-21 |
Centipede Semi Ltd. |
Parallelized execution of instruction sequences
|
CN107430511A
(zh)
*
|
2015-03-31 |
2017-12-01 |
森蒂彼得塞米有限公司 |
基于预监控的指令序列的并行执行
|
US9715390B2
(en)
|
2015-04-19 |
2017-07-25 |
Centipede Semi Ltd. |
Run-time parallelization of code execution based on an approximate register-access specification
|
US9940136B2
(en)
|
2015-06-26 |
2018-04-10 |
Microsoft Technology Licensing, Llc |
Reuse of decoded instructions
|
US10409606B2
(en)
|
2015-06-26 |
2019-09-10 |
Microsoft Technology Licensing, Llc |
Verifying branch targets
|
US10346168B2
(en)
|
2015-06-26 |
2019-07-09 |
Microsoft Technology Licensing, Llc |
Decoupled processor instruction window and operand buffer
|
US9946548B2
(en)
|
2015-06-26 |
2018-04-17 |
Microsoft Technology Licensing, Llc |
Age-based management of instruction blocks in a processor instruction window
|
US10175988B2
(en)
|
2015-06-26 |
2019-01-08 |
Microsoft Technology Licensing, Llc |
Explicit instruction scheduler state information for a processor
|
US10409599B2
(en)
|
2015-06-26 |
2019-09-10 |
Microsoft Technology Licensing, Llc |
Decoding information about a group of instructions including a size of the group of instructions
|
US11755484B2
(en)
|
2015-06-26 |
2023-09-12 |
Microsoft Technology Licensing, Llc |
Instruction block allocation
|
US10169044B2
(en)
|
2015-06-26 |
2019-01-01 |
Microsoft Technology Licensing, Llc |
Processing an encoding format field to interpret header information regarding a group of instructions
|
US9952867B2
(en)
|
2015-06-26 |
2018-04-24 |
Microsoft Technology Licensing, Llc |
Mapping instruction blocks based on block size
|
US10191747B2
(en)
|
2015-06-26 |
2019-01-29 |
Microsoft Technology Licensing, Llc |
Locking operand values for groups of instructions executed atomically
|
US10719321B2
(en)
|
2015-09-19 |
2020-07-21 |
Microsoft Technology Licensing, Llc |
Prefetching instruction blocks
|
US10936316B2
(en)
|
2015-09-19 |
2021-03-02 |
Microsoft Technology Licensing, Llc |
Dense read encoding for dataflow ISA
|
US11977891B2
(en)
|
2015-09-19 |
2024-05-07 |
Microsoft Technology Licensing, Llc |
Implicit program order
|
US10452399B2
(en)
|
2015-09-19 |
2019-10-22 |
Microsoft Technology Licensing, Llc |
Broadcast channel architectures for block-based processors
|
US10768936B2
(en)
|
2015-09-19 |
2020-09-08 |
Microsoft Technology Licensing, Llc |
Block-based processor including topology and control registers to indicate resource sharing and size of logical processor
|
US10061584B2
(en)
|
2015-09-19 |
2018-08-28 |
Microsoft Technology Licensing, Llc |
Store nullification in the target field
|
US11681531B2
(en)
|
2015-09-19 |
2023-06-20 |
Microsoft Technology Licensing, Llc |
Generation and use of memory access instruction order encodings
|
US10871967B2
(en)
|
2015-09-19 |
2020-12-22 |
Microsoft Technology Licensing, Llc |
Register read/write ordering
|
US10031756B2
(en)
|
2015-09-19 |
2018-07-24 |
Microsoft Technology Licensing, Llc |
Multi-nullification
|
US10180840B2
(en)
|
2015-09-19 |
2019-01-15 |
Microsoft Technology Licensing, Llc |
Dynamic generation of null instructions
|
US11016770B2
(en)
|
2015-09-19 |
2021-05-25 |
Microsoft Technology Licensing, Llc |
Distinct system registers for logical processors
|
US10776115B2
(en)
|
2015-09-19 |
2020-09-15 |
Microsoft Technology Licensing, Llc |
Debug support for block-based processor
|
US10095519B2
(en)
|
2015-09-19 |
2018-10-09 |
Microsoft Technology Licensing, Llc |
Instruction block address register
|
US10198263B2
(en)
|
2015-09-19 |
2019-02-05 |
Microsoft Technology Licensing, Llc |
Write nullification
|
US10678544B2
(en)
|
2015-09-19 |
2020-06-09 |
Microsoft Technology Licensing, Llc |
Initiating instruction block execution using a register access instruction
|
US11126433B2
(en)
|
2015-09-19 |
2021-09-21 |
Microsoft Technology Licensing, Llc |
Block-based processor core composition register
|
US20170315812A1
(en)
|
2016-04-28 |
2017-11-02 |
Microsoft Technology Licensing, Llc |
Parallel instruction scheduler for block isa processor
|
US11531552B2
(en)
|
2017-02-06 |
2022-12-20 |
Microsoft Technology Licensing, Llc |
Executing multiple programs simultaneously on a processor core
|
US10275250B2
(en)
*
|
2017-03-06 |
2019-04-30 |
Arm Limited |
Defer buffer
|
US11175924B2
(en)
|
2017-10-06 |
2021-11-16 |
International Business Machines Corporation |
Load-store unit with partitioned reorder queues with single cam port
|
US10606591B2
(en)
|
2017-10-06 |
2020-03-31 |
International Business Machines Corporation |
Handling effective address synonyms in a load-store unit that operates without address translation
|
US10394558B2
(en)
|
2017-10-06 |
2019-08-27 |
International Business Machines Corporation |
Executing load-store operations without address translation hardware per load-store unit port
|
US10534616B2
(en)
*
|
2017-10-06 |
2020-01-14 |
International Business Machines Corporation |
Load-hit-load detection in an out-of-order processor
|
US10417002B2
(en)
|
2017-10-06 |
2019-09-17 |
International Business Machines Corporation |
Hazard detection of out-of-order execution of load and store instructions in processors without using real addresses
|
US10606590B2
(en)
|
2017-10-06 |
2020-03-31 |
International Business Machines Corporation |
Effective address based load store unit in out of order processors
|
US10572256B2
(en)
|
2017-10-06 |
2020-02-25 |
International Business Machines Corporation |
Handling effective address synonyms in a load-store unit that operates without address translation
|
CN111542808B
(zh)
*
|
2017-12-26 |
2024-03-22 |
三星电子株式会社 |
预测电子设备上运行应用的线程的最优数量的方法和系统
|
US10963379B2
(en)
|
2018-01-30 |
2021-03-30 |
Microsoft Technology Licensing, Llc |
Coupling wide memory interface to wide write back paths
|
US11513840B2
(en)
*
|
2018-05-07 |
2022-11-29 |
Micron Technology, Inc. |
Thread creation on local or remote compute elements by a multi-threaded, self-scheduling processor
|
US10824429B2
(en)
|
2018-09-19 |
2020-11-03 |
Microsoft Technology Licensing, Llc |
Commit logic and precise exceptions in explicit dataflow graph execution architectures
|
CN112579169B
(zh)
*
|
2019-09-27 |
2024-04-09 |
阿里巴巴集团控股有限公司 |
处理器追踪流的生成方法及装置
|
US11494189B2
(en)
*
|
2020-02-21 |
2022-11-08 |
Pensando Systems Inc. |
Methods and systems for processing data in a programmable data processing pipeline that includes out-of-pipeline processing
|