GB2322210B - Processor having multiple instruction registers - Google Patents
Processor having multiple instruction registersInfo
- Publication number
- GB2322210B GB2322210B GB9810670A GB9810670A GB2322210B GB 2322210 B GB2322210 B GB 2322210B GB 9810670 A GB9810670 A GB 9810670A GB 9810670 A GB9810670 A GB 9810670A GB 2322210 B GB2322210 B GB 2322210B
- Authority
- GB
- United Kingdom
- Prior art keywords
- processor
- multiple instruction
- instruction registers
- registers
- instruction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
- G06F9/3016—Decoding the operand specifier, e.g. specifier format
- G06F9/30167—Decoding the operand specifier, e.g. specifier format of immediate specifier, e.g. constants
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3818—Decoding for concurrent execution
- G06F9/3822—Parallel decoding, e.g. parallel decode units
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5352824A JPH07200289A (en) | 1993-12-28 | 1993-12-28 | Information processor |
GB9424058A GB2285322B (en) | 1993-12-28 | 1994-11-29 | Processor having multiple instruction register |
Publications (3)
Publication Number | Publication Date |
---|---|
GB9810670D0 GB9810670D0 (en) | 1998-07-15 |
GB2322210A GB2322210A (en) | 1998-08-19 |
GB2322210B true GB2322210B (en) | 1998-10-07 |
Family
ID=26306059
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9810670A Expired - Fee Related GB2322210B (en) | 1993-12-28 | 1994-11-29 | Processor having multiple instruction registers |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2322210B (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20020032558A1 (en) * | 2000-03-10 | 2002-03-14 | Paul Strong | Method and apparatus for enhancing the performance of a pipelined data processor |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1271127A (en) * | 1968-10-31 | 1972-04-19 | Hitachi Ltd | A digital electronic computer including an instruction buffer |
EP0490524A2 (en) * | 1990-12-07 | 1992-06-17 | International Business Machines Corporation | Pipelined apparatus and method |
-
1994
- 1994-11-29 GB GB9810670A patent/GB2322210B/en not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1271127A (en) * | 1968-10-31 | 1972-04-19 | Hitachi Ltd | A digital electronic computer including an instruction buffer |
EP0490524A2 (en) * | 1990-12-07 | 1992-06-17 | International Business Machines Corporation | Pipelined apparatus and method |
Also Published As
Publication number | Publication date |
---|---|
GB9810670D0 (en) | 1998-07-15 |
GB2322210A (en) | 1998-08-19 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 20041129 |