HK1015519A1 - Multiple writes per a single erase for a nonvolatile memory - Google Patents

Multiple writes per a single erase for a nonvolatile memory

Info

Publication number
HK1015519A1
HK1015519A1 HK99100214A HK99100214A HK1015519A1 HK 1015519 A1 HK1015519 A1 HK 1015519A1 HK 99100214 A HK99100214 A HK 99100214A HK 99100214 A HK99100214 A HK 99100214A HK 1015519 A1 HK1015519 A1 HK 1015519A1
Authority
HK
Hong Kong
Prior art keywords
nonvolatile memory
single erase
multiple writes
writes per
per
Prior art date
Application number
HK99100214A
Other languages
English (en)
Inventor
Robert N Hasbun
Frank P Janecek
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US08/537,132 external-priority patent/US5815434A/en
Application filed by Intel Corp filed Critical Intel Corp
Publication of HK1015519A1 publication Critical patent/HK1015519A1/xx

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G11C11/5635—Erasing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5642—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/564—Miscellaneous aspects
    • G11C2211/5641—Multilevel memory having cells with different number of storage levels

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
HK99100214A 1995-09-29 1999-01-15 Multiple writes per a single erase for a nonvolatile memory HK1015519A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US08/537,132 US5815434A (en) 1995-09-29 1995-09-29 Multiple writes per a single erase for a nonvolatile memory
US08/685,939 US5936884A (en) 1995-09-29 1996-07-22 Multiple writes per a single erase for a nonvolatile memory
PCT/US1996/015259 WO1997012368A1 (en) 1995-09-29 1996-09-24 Multiple writes per a single erase for a nonvolatile memory

Publications (1)

Publication Number Publication Date
HK1015519A1 true HK1015519A1 (en) 1999-10-15

Family

ID=27065382

Family Applications (1)

Application Number Title Priority Date Filing Date
HK99100214A HK1015519A1 (en) 1995-09-29 1999-01-15 Multiple writes per a single erase for a nonvolatile memory

Country Status (8)

Country Link
EP (1) EP0852798B1 (de)
CN (1) CN1114214C (de)
AU (1) AU7165696A (de)
DE (1) DE69626654T2 (de)
HK (1) HK1015519A1 (de)
IL (1) IL123688A (de)
MX (1) MX9802298A (de)
WO (1) WO1997012368A1 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE60134870D1 (de) 2001-12-28 2008-08-28 St Microelectronics Srl Programmierverfahren für eine Multibitspeicherzelle
EP1503384A3 (de) * 2003-07-21 2007-07-18 Macronix International Co., Ltd. Verfahren zur Speicherprogrammierung
US7132350B2 (en) 2003-07-21 2006-11-07 Macronix International Co., Ltd. Method for manufacturing a programmable eraseless memory
KR101303177B1 (ko) * 2007-06-22 2013-09-17 삼성전자주식회사 불휘발성 메모리 소자 및 그 동작 방법
KR101544607B1 (ko) 2008-10-28 2015-08-17 삼성전자주식회사 메모리 장치 및 그 프로그램 방법
US8149607B2 (en) 2009-12-21 2012-04-03 Sandisk 3D Llc Rewritable memory device with multi-level, write-once memory cells
US9070453B2 (en) 2010-04-15 2015-06-30 Ramot At Tel Aviv University Ltd. Multiple programming of flash memory without erase
US10261897B2 (en) 2017-01-20 2019-04-16 Samsung Electronics Co., Ltd. Tail latency aware foreground garbage collection algorithm

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5163021A (en) * 1989-04-13 1992-11-10 Sundisk Corporation Multi-state EEprom read and write circuits and techniques
US5487033A (en) * 1994-06-28 1996-01-23 Intel Corporation Structure and method for low current programming of flash EEPROMS

Also Published As

Publication number Publication date
DE69626654T2 (de) 2004-02-05
EP0852798A1 (de) 1998-07-15
AU7165696A (en) 1997-04-17
EP0852798A4 (de) 1999-05-26
DE69626654D1 (de) 2003-04-17
IL123688A0 (en) 1998-10-30
WO1997012368A1 (en) 1997-04-03
CN1114214C (zh) 2003-07-09
CN1202262A (zh) 1998-12-16
IL123688A (en) 2000-12-06
MX9802298A (es) 1998-08-30
EP0852798B1 (de) 2003-03-12

Similar Documents

Publication Publication Date Title
HK1016737A1 (en) Multiple writes per a single erase for a nonvolatile memory
SG68590A1 (en) Method for programming a nonvolatile memory
GB9417266D0 (en) Testing a non-volatile memory
GB2326748B (en) A nonvolatile memory structure
EP0823117A4 (de) Architektur für das blockweise aufteilen eines nichtflüchtigen speichers
AU5146598A (en) Improved register interface for flash eeprom memory arrays
GB2320377B (en) A nonvolatile ferroelectric memory device
AU5152098A (en) Improved interface for flash eeprom memory arrays
EP0756328A3 (de) Nichtflüchtige Speicherzelle mit einem einzigen Polysiliziumgate
HK1016738A1 (en) Programming flash memory using distributed learning methods
DE69423077D1 (de) Steuerungsvorrichtungen für nichtflüchtige Speicheranordnungen
AU5001497A (en) Improved interface for flash eeprom memory arrays
GB2302971B (en) Method of erasing a flash memory device
GB9621504D0 (en) Flash memory device
GB2302604B (en) Data memory access control
HK1015519A1 (en) Multiple writes per a single erase for a nonvolatile memory
GB2306717B (en) Flash memory device
GB2320810A8 (en) A flash memory array
EP0661712A3 (de) Nichtflüchtige Speicher.
GB2308471B (en) Memory defragmentation
EP0590319A3 (de) Nichtflüchtige Speicherzelle.
GB2314952B (en) Method of erasing a flash memory device
EP0463331A3 (en) An improved method for programming a non-volatile memory
DE69516883D1 (de) Löschverfahren für einen nicht flüchtigen Speicher
DE69325587D1 (de) Zähleinheit für nichtflüchtige Speicher

Legal Events

Date Code Title Description
PF Patent in force
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20100924