HK1004611A1 - Data processing system providing an extensible register and method thereof - Google Patents

Data processing system providing an extensible register and method thereof

Info

Publication number
HK1004611A1
HK1004611A1 HK98103584A HK98103584A HK1004611A1 HK 1004611 A1 HK1004611 A1 HK 1004611A1 HK 98103584 A HK98103584 A HK 98103584A HK 98103584 A HK98103584 A HK 98103584A HK 1004611 A1 HK1004611 A1 HK 1004611A1
Authority
HK
Hong Kong
Prior art keywords
data processing
processing system
system providing
extensible
register
Prior art date
Application number
HK98103584A
Other languages
English (en)
Inventor
Charles F Studor
James S Divine
Michael I Catherwood
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of HK1004611A1 publication Critical patent/HK1004611A1/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G06F9/342—Extension of operand address space
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30101—Special purpose registers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G06F9/30112—Register structure comprising data of variable length
HK98103584A 1992-12-24 1998-04-28 Data processing system providing an extensible register and method thereof HK1004611A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/996,744 US5680632A (en) 1992-12-24 1992-12-24 Method for providing an extensible register in the first and second data processing systems

Publications (1)

Publication Number Publication Date
HK1004611A1 true HK1004611A1 (en) 1998-11-27

Family

ID=25543253

Family Applications (1)

Application Number Title Priority Date Filing Date
HK98103584A HK1004611A1 (en) 1992-12-24 1998-04-28 Data processing system providing an extensible register and method thereof

Country Status (6)

Country Link
US (1) US5680632A (fr)
EP (1) EP0614137B1 (fr)
JP (1) JP3616402B2 (fr)
KR (1) KR100287600B1 (fr)
DE (1) DE69315192T2 (fr)
HK (1) HK1004611A1 (fr)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW267222B (en) * 1994-10-05 1996-01-01 Ibm Improved method and system of addressing
JP2885197B2 (ja) * 1996-08-16 1999-04-19 日本電気株式会社 演算処理装置及び演算処理方法
US5948076A (en) * 1997-12-31 1999-09-07 Adaptec, Inc. Method and system for changing peripheral component interconnect configuration registers
US6366998B1 (en) 1998-10-14 2002-04-02 Conexant Systems, Inc. Reconfigurable functional units for implementing a hybrid VLIW-SIMD programming model
WO2001025941A1 (fr) 1999-10-06 2001-04-12 Cradle Technologies Systemes informatiques multiprocesseurs comportant une file d'attente de commandes au niveau de chaque dispositif cible
US6351806B1 (en) 1999-10-06 2002-02-26 Cradle Technologies Risc processor using register codes for expanded instruction set
WO2001069411A2 (fr) 2000-03-10 2001-09-20 Arc International Plc Interface memoire et procede permettant de creer des interfaces entre des entites fonctionnelles
JP2003162411A (ja) * 2001-11-28 2003-06-06 Hitachi Ltd データプロセッサ
US7203820B2 (en) * 2002-06-28 2007-04-10 Sun Microsystems, Inc. Extending a register file utilizing stack and queue techniques
US20040049657A1 (en) * 2002-09-10 2004-03-11 Kling Ralph M. Extended register space apparatus and methods for processors
US8464030B2 (en) * 2010-04-09 2013-06-11 International Business Machines Corporation Instruction cracking and issue shortening based on instruction base fields, index fields, operand fields, and various other instruction text bits
US9507599B2 (en) 2013-07-22 2016-11-29 Globalfoundries Inc. Instruction set architecture with extensible register addressing
JP6314717B2 (ja) * 2014-07-18 2018-04-25 株式会社安川電機 ラダープログラム作成装置、モニタリング装置、コンピュータプログラム及び機器制御装置

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4040035A (en) * 1974-10-30 1977-08-02 Motorola, Inc. Microprocessor having index register coupled to serial-coupled address bus sections and to data bus
US4363091A (en) * 1978-01-31 1982-12-07 Intel Corporation Extended address, single and multiple bit microprocessor
NL7807314A (nl) * 1978-07-06 1980-01-08 Philips Nv Inrichting voor het vergroten van de lengte van een logisch computeradres.
US4240142A (en) * 1978-12-29 1980-12-16 Bell Telephone Laboratories, Incorporated Data processing apparatus providing autoincrementing of memory pointer registers
US4277827A (en) * 1979-01-02 1981-07-07 Texas Instruments Incorporated Microprocessor based system for the development and emulation of programmable calculator control read only memory software
US4300195A (en) * 1979-08-09 1981-11-10 Motorola, Inc. CMOS Microprocessor architecture
US4287566A (en) * 1979-09-28 1981-09-01 Culler-Harrison Inc. Array processor with parallel operations per instruction
US4430705A (en) * 1980-05-23 1984-02-07 International Business Machines Corp. Authorization mechanism for establishing addressability to information in another address space
US4679166A (en) * 1983-01-17 1987-07-07 Tandy Corporation Co-processor combination
US4876639A (en) * 1983-09-20 1989-10-24 Mensch Jr William D Method and circuitry for causing sixteen bit microprocessor to execute eight bit op codes to produce either internal sixteen bit operation or internal eight bit operation in accordance with an emulation bit
US4722047A (en) * 1985-08-29 1988-01-26 Ncr Corporation Prefetch circuit and associated method for operation with a virtual command emulator
US4878197A (en) * 1987-08-17 1989-10-31 Control Data Corporation Data communication apparatus
US5125087A (en) * 1988-11-07 1992-06-23 Microsoft Corporation Method of resetting sequence of access to extended memory disrupted by interrupt processing in 80286 compatible system using code segment register
US5297272A (en) * 1989-08-02 1994-03-22 Advanced Logic Research, Inc. Apparatus for automatically disabling and isolating a computer's original processor upon installation of a processor upgrade card
US5261077A (en) * 1990-06-29 1993-11-09 Digital Equipment Corporation Configurable data path arrangement for resolving data type incompatibility
DE69227604T2 (de) * 1991-03-11 1999-06-24 Silicon Graphics Inc Mountain Rückwärts kompatible Rechnerarchitektur mit erweiterten Wortbreiten und Adressraum

Also Published As

Publication number Publication date
JP3616402B2 (ja) 2005-02-02
EP0614137A2 (fr) 1994-09-07
EP0614137A3 (fr) 1995-04-26
JPH06230962A (ja) 1994-08-19
KR940015806A (ko) 1994-07-21
EP0614137B1 (fr) 1997-11-12
DE69315192T2 (de) 1998-04-02
KR100287600B1 (ko) 2001-04-16
DE69315192D1 (de) 1997-12-18
US5680632A (en) 1997-10-21

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Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20031111

PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)