GB951329A - Electrical waveform peak amplitude discriminators - Google Patents

Abstract

951,329. Peak voltage measurement. MINISTER OF AVIATION. July 20, 1962 [July 20, 1961], No. 26309/61. Heading G1U. An electrical waveform peak amplitude discriminator comprises a gate, threshold circuit opening the gate upon an input signal amplitude exceeding a first level, a threshold circuit closing the gate upon the input signal amplitude exceeding a second high level, and trigger means applying a pulse to the gate upon the signal amplitude exceeding or falling below the first level; so that the output of the gate develops a pulse only when the signal amplitude has previously risen above the first level but not above the second higher level. An input signal (Fig.2a) is applied to adjustable Schmitt trigger threshold circuits 1, 2 (Fig. 1) each producing an output pulse when the input rises above the respective preset threshold values A, B (Fig. 2a). The output of 1 (Fig. 2b) is applied to a bi-stable trigger circuit 3 to pulse it from the 0 to the 1 state, while the output of 2 (Fig.2c) is applied to pulse it from the 1 to the 0 state. The trigger output 3 is applied to a delay unit 4 of time T whose output (Fig. 2d) operates a gate 5 also receiving the output of 1 to open for the duration of the shaded areas, so as to admit any pulses in the output of 1 during the open period to counter 6; such pulses occurring only when the input amplitude rises above threshold A and has not exceeded threshold B since the preceding rise through A, so that the count represents the amplitude peaks in the range AB. In modifications delay unit 4 may be placed between the output of threshold circuit 1 and the input of trigger 3, or delay unit 4 may be omitted and a second output taken from threshold circuit 1 so that a pulse is derived when the input falls below threshold A and is applied to gate 5. For analysis of the distribution of peak voltage amplitudes of a repetitive waveform, the thresholds are fixed and the input passed through a variable gain amplifier and added to a variable D.C. bias, the waveform being examined using different levels of gain and bias, with the resulting count indicated by 6. In Fig. 3 the circuit of Fig. 1 has added a third threshold circuit 7 fed from the input responsive to a level C exceeding B whose output is applied to trigger circuit 8 from 1 to 0. The trigger is also operated from 0 to 1 by the output of threshold circuit 2, and its output controls coincidence gate 10 over delay 9 to open shortly after the 1 state and close shortly after the 0 state. The output of gate 10 is applied to counter 11 to register the peaks lying between thresholds A, B and may be interconnected with the input of counter 6 to register the total peaks exceeding threshold A. Further threshold circuits, triggers, gates and counters may be added to register peaks between further thresholds.