GB1025803A - Electronic frequency meter - Google Patents

Abstract

1,025,803. Frequency detectors. COMPAGNIE INDUSTRIELLE DES TELECOMMUNICATIONS. May 7, 1963 [Sept. 21, 1962], No. 18070/63. Heading H3A. [Also in Division G4] In a digital frequency meter employing a counter and using a D.C. voltmeter as an output indicator an " expanded scale " is obtained by controlling the voltmeter from the lower denominational stages of the counter, the higher stages being used merely to decide upon the range in which the frequency lies. The arrangement described is particularly adapted for measuring A.C. mains supply frequency, which should not depart by more than 2 c/s. from its nominal frequency of 50 c/s. The frequency is measured by counting the clock pulses from a 73À5 kc/s. source that occur in one cycle of the mains voltage. A frequency range of 52 to 48 c/s. then corresponds to a count range of 1413 to 1531. Now with an eleven-stage binary counter a range of 10110000000 to 10111111111 (i.e. from 1408 to 1535), over which the top four denominations remain constant at 1011 and the bottom seven denominations vary from 0000000 to 1111111, corresponds to a range of 52À2 to 47À9 c/s. Also even though the count varies inversely with the mains frequency over this small range the count varies substantially linearly with the frequency. Thus, in the arrangement described, if the count, at the end of a mains cycle, lies in the range 1408 to 1535 the count in the bottom seven denominations is displayed by converting the inverse of the count (to avoid a reverse reading scale) to a corresponding voltage which is indicated on a voltmeter, graduated, as shown in Fig. 3, linearly from 48 to 52 c/s. If, however, the count is not in the range 1408 to 1535 then the voltmeter is so controlled as to indicate either zero or a full scale deflection, that is the actual count in the bottom seven denominations is ignored. A block diagram is shown in Fig. 1 and it comprises a first gate 13 which is opened by a trigger 14 under control of a main timer 16 to pass the squared mains voltage to a trigger 26 which opens a counting gate 21 for one cycle of the mains voltage to allow the relatively high frequency clock pulses from a source 22 to pass to the counter III, the inverse outputs of the bottom seven denominations of which control a digital-to-analogue converter 29 and voltmeter 30. At the end of the counting period, when trigger 26 closes gate 21, it also resets trigger 14 via OR gate 27 and hence closes gate 13. If, by the end of the counting period, the count has not exceeded the lower end of the range, namely 10110000000, then a trigger 24, which is also turned on at the beginning of a measurement period by the timer 16, will not have been turned off, so that a pulse will pass via gates 25 and 17 and delay 18 to zeroize the counter and hence cause a full scale deflection on the voltmeter. If during the counting period the count reaches the upper end of the range, namely 10111111111, that a gate 19 closes the counting gate 21 and a zero deflection is produced on the meter.