GB9426147D0 - Method for fabricating semi-conductor device - Google Patents

Method for fabricating semi-conductor device

Info

Publication number
GB9426147D0
GB9426147D0 GBGB9426147.6A GB9426147A GB9426147D0 GB 9426147 D0 GB9426147 D0 GB 9426147D0 GB 9426147 A GB9426147 A GB 9426147A GB 9426147 D0 GB9426147 D0 GB 9426147D0
Authority
GB
United Kingdom
Prior art keywords
conductor device
fabricating semi
fabricating
semi
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GBGB9426147.6A
Other versions
GB2285336A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of GB9426147D0 publication Critical patent/GB9426147D0/en
Publication of GB2285336A publication Critical patent/GB2285336A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H01L21/32137Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas of silicon-containing layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Plasma & Fusion (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)
  • Electrodes Of Semiconductors (AREA)
GB9426147A 1993-12-30 1994-12-23 Polysilicon/silicide etching method Withdrawn GB2285336A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5353707A JP2907314B2 (en) 1993-12-30 1993-12-30 Method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
GB9426147D0 true GB9426147D0 (en) 1995-02-22
GB2285336A GB2285336A (en) 1995-07-05

Family

ID=18432679

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9426147A Withdrawn GB2285336A (en) 1993-12-30 1994-12-23 Polysilicon/silicide etching method

Country Status (2)

Country Link
JP (1) JP2907314B2 (en)
GB (1) GB2285336A (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6008139A (en) * 1996-06-17 1999-12-28 Applied Materials Inc. Method of etching polycide structures
US5880033A (en) * 1996-06-17 1999-03-09 Applied Materials, Inc. Method for etching metal silicide with high selectivity to polysilicon
KR100274597B1 (en) * 1997-05-19 2001-02-01 윤종용 Etch gas composition of polycrystalline silicon layer and tungsten silicide layer for manufacturing semiconductor device and plasma etch method using the same
JP3003657B2 (en) * 1997-12-24 2000-01-31 日本電気株式会社 Method for manufacturing semiconductor device
US6242362B1 (en) * 1999-08-04 2001-06-05 Taiwan Semiconductor Manufacturing Company Etch process for fabricating a vertical hard mask/conductive pattern profile to improve T-shaped profile for a silicon oxynitride hard mask

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5160408A (en) * 1990-04-27 1992-11-03 Micron Technology, Inc. Method of isotropically dry etching a polysilicon containing runner with pulsed power
JP3033128B2 (en) * 1990-05-25 2000-04-17 ソニー株式会社 Dry etching method
US5167762A (en) * 1991-01-02 1992-12-01 Micron Technology, Inc. Anisotropic etch method

Also Published As

Publication number Publication date
JPH07201830A (en) 1995-08-04
JP2907314B2 (en) 1999-06-21
GB2285336A (en) 1995-07-05

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)