GB9413568D0 - Semiconductor devices - Google Patents

Semiconductor devices

Info

Publication number
GB9413568D0
GB9413568D0 GB9413568A GB9413568A GB9413568D0 GB 9413568 D0 GB9413568 D0 GB 9413568D0 GB 9413568 A GB9413568 A GB 9413568A GB 9413568 A GB9413568 A GB 9413568A GB 9413568 D0 GB9413568 D0 GB 9413568D0
Authority
GB
United Kingdom
Prior art keywords
semiconductor devices
semiconductor
devices
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
GB9413568A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Electrotech Equipments Ltd
Original Assignee
Electrotech Equipments Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Electrotech Equipments Ltd filed Critical Electrotech Equipments Ltd
Priority to GB9413568A priority Critical patent/GB9413568D0/en
Publication of GB9413568D0 publication Critical patent/GB9413568D0/en
Priority to PCT/GB1995/001571 priority patent/WO1996001496A1/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53214Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H01L23/53223Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
GB9413568A 1994-07-06 1994-07-06 Semiconductor devices Pending GB9413568D0 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
GB9413568A GB9413568D0 (en) 1994-07-06 1994-07-06 Semiconductor devices
PCT/GB1995/001571 WO1996001496A1 (en) 1994-07-06 1995-07-04 Method of manufacturing a semiconductor device with a moisture impermeable barrier layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB9413568A GB9413568D0 (en) 1994-07-06 1994-07-06 Semiconductor devices

Publications (1)

Publication Number Publication Date
GB9413568D0 true GB9413568D0 (en) 1994-08-24

Family

ID=10757871

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9413568A Pending GB9413568D0 (en) 1994-07-06 1994-07-06 Semiconductor devices

Country Status (2)

Country Link
GB (1) GB9413568D0 (en)
WO (1) WO1996001496A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6028013A (en) * 1999-05-06 2000-02-22 Vlsi Technology, Inc. Moisture repellant integrated circuit dielectric material combination
DE102018117349B4 (en) * 2018-07-18 2020-07-16 B-Horizon GmbH Device for measuring pressure and humidity

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5284801A (en) * 1992-07-22 1994-02-08 Vlsi Technology, Inc. Methods of moisture protection in semiconductor devices utilizing polyimides for inter-metal dielectric
JPH0661498A (en) * 1992-08-05 1994-03-04 Nec Corp Non-volatile semiconductor storage

Also Published As

Publication number Publication date
WO1996001496A1 (en) 1996-01-18

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