GB929064A - Improvements in or relating to multivibrator circuit arrangements - Google Patents

Abstract

929,064. Analogue multipliers. NATIONAL RESEARCH DEVELOPMENT CORPORATION. March 6, 1962 [March 6, 1961; Aug. 4, 1961], Nos. 8103/61 and 28432/61. Class 37. [Also in Group XL (c)] Relates to a circuit arrangement comprising a pair of crosscoupled transistors connected to form a free-running multivibrator and a further pair of transistors arranged respectively in the current supply paths to similar electrodes of the cross-coupled transistors, the further pair of transistors being connected in a longtailed pair circuit to provide a pair of output currents whose ratio varies in accordance with the value of an input current or voltage applied to one of the said further pair of transistors, whereby the multivibrator provides an output signal having a mark/space ratio which varies in accordance with the value of the input current or voltage. The arrangement may be utilized in effecting analogue multiplication of a pair of numbers, the broad principle of the system used being shown in Fig. 1. A switch S is constantly switched by a means M with a fixed cycle time but variable mark/space ratio depending on one voltage input V2. This allows a voltage V1 to be fed to integrating circuit IC for a proportion of time dependent on V2 so that an output VO is obtained proportional to V1, V2. To produce an output of correct sign (4 quadrant multiplication) a voltage #V1 1 is fed to opposite contacts on the switch S and the input V2 determines how far and in which direction the means M alters the 1: 1 mark/space ratio. A two quadrant multiplier is illustrated in Fig. 2, where PNP transistors J1, J2 are in the circuit of an emitter coupled free-running multivibrator, the output from which, taken across the collector load R18, represents the output from means M. The currents through the respective emitters, which control the mark/space ratio, are controlled by the longtailed pair arrangement of the transistors J3 and J4 the setting of which is controlled by the input V2. A constant current arrangement including a transistor J5 is included in the emitters, ensuring constant frequency of the long-tailed pair arrangement. The output from the arrangement passes via the transistor stage J6 to the transistor J7 which, when switched off, allows the other analogue voltage input V1 to be fed to the integrator IC. A modification of this circuit to allow four quadrant operation is described (Fig. 3, not shown) wherein R18 is replaced by a transformer arrangement; an alternative form of output integrating circuit is also suggested (Fig. 4, not shown). The unsymmetrical multivibrator arrangement described above may be replaced by a symmetrical one using NPN transistors J1, J2 in the circuit of Fig. 5, NPN transistors J3, J4 comprise the long-tailed pair arrangement controlled by inputs X at either T2 or T5, while shorting links SL1 or SL2 connecting the base of the opposite transistor to earth. PNP transistors J6, J8 are amplifying stages, while J7, J9 are the output switching stages. Trimmer capacitors C1, C9 are provided to equalize the emitter base capacitance of the output transistors J7, J9. Inputs Y and -Y which are applied to terminals T1, T3 respectively will be passed to an integrating condenser C4 when the switches allow, and hence a voltage proportional to XY will be passed to the output terminal T4. An arrangement (Fig. 6, not shown) is described which avoids the necessity of applying the -Y input to the circuit of Fig. 5.