GB9018448D0 - A method of testing a semiconductor device - Google Patents

A method of testing a semiconductor device

Info

Publication number
GB9018448D0
GB9018448D0 GB909018448A GB9018448A GB9018448D0 GB 9018448 D0 GB9018448 D0 GB 9018448D0 GB 909018448 A GB909018448 A GB 909018448A GB 9018448 A GB9018448 A GB 9018448A GB 9018448 D0 GB9018448 D0 GB 9018448D0
Authority
GB
United Kingdom
Prior art keywords
testing
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB909018448A
Other versions
GB2247565A (en
GB2247565B (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Electric Co PLC
Original Assignee
General Electric Co PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by General Electric Co PLC filed Critical General Electric Co PLC
Priority to GB9018448A priority Critical patent/GB2247565B/en
Publication of GB9018448D0 publication Critical patent/GB9018448D0/en
Publication of GB2247565A publication Critical patent/GB2247565A/en
Application granted granted Critical
Publication of GB2247565B publication Critical patent/GB2247565B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2855Environmental, reliability or burn-in testing
    • G01R31/286External aspects, e.g. related to chambers, contacting devices or handlers
    • G01R31/2863Contacting devices, e.g. sockets, burn-in boards or mounting fixtures
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2886Features relating to contacting the IC under test, e.g. probe heads; chucks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
GB9018448A 1990-08-22 1990-08-22 A method of testing a semiconductor device Expired - Fee Related GB2247565B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB9018448A GB2247565B (en) 1990-08-22 1990-08-22 A method of testing a semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB9018448A GB2247565B (en) 1990-08-22 1990-08-22 A method of testing a semiconductor device

Publications (3)

Publication Number Publication Date
GB9018448D0 true GB9018448D0 (en) 1990-10-03
GB2247565A GB2247565A (en) 1992-03-04
GB2247565B GB2247565B (en) 1994-07-06

Family

ID=10681072

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9018448A Expired - Fee Related GB2247565B (en) 1990-08-22 1990-08-22 A method of testing a semiconductor device

Country Status (1)

Country Link
GB (1) GB2247565B (en)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5289631A (en) * 1992-03-04 1994-03-01 Mcnc Method for testing, burn-in, and/or programming of integrated circuit chips
CA2110472C (en) * 1993-03-01 1999-08-10 Anilkumar Chinuprasad Bhatt Method and apparatus for in-situ testing of integrated circuit chips
DE4400551C2 (en) * 1994-01-11 1997-04-10 Siemens Ag Device for reversible chip contacting and method for testing semiconductor circuit levels
DE59501667D1 (en) * 1994-01-11 1998-04-30 Siemens Ag Test procedure for semiconductor circuit levels
DE4418679A1 (en) * 1994-05-28 1995-11-30 Telefunken Microelectron Integrated circuit interconnect system for wafer test
US5447264A (en) * 1994-07-01 1995-09-05 Mcnc Recessed via apparatus for testing, burn-in, and/or programming of integrated circuit chips, and for placing solder bumps thereon
EP1408337A3 (en) * 1994-11-15 2007-09-19 FormFactor, Inc. Probe card assembly
US20100065963A1 (en) 1995-05-26 2010-03-18 Formfactor, Inc. Method of wirebonding that utilizes a gas flow within a capillary from which a wire is played out
TW308724B (en) * 1995-07-03 1997-06-21 Motorola Inc

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0351581A1 (en) * 1988-07-22 1990-01-24 Oerlikon-Contraves AG High-density integrated circuit and method for its production

Also Published As

Publication number Publication date
GB2247565A (en) 1992-03-04
GB2247565B (en) 1994-07-06

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Legal Events

Date Code Title Description
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)
PCNP Patent ceased through non-payment of renewal fee